Serge Vernalde

According to our database, Serge Vernalde authored at least 45 papers between 1994 and 2004.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2004

A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs.

Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor

Microprocess. Microsystems, 2004

Run-time support for heterogeneous multitasking on reconfigurable SoCs.

Théodore Marescaux, Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Prabhat Avasare, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins

Integr., 2004

Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arrays.

Steven J. E. Wilton, Noha Kafafi, Bingfeng Mei, Serge Vernalde

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation.

T. Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frédéric Robert

Proceedings of the Field Programmable Logic and Application, 2004

Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study.

Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins

Proceedings of the 2004 Design, 2004

Operating-system controlled network on chip.

Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde

Proceedings of the 41th Design Automation Conference, 2004

2003

Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java.

Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor

Proceedings of the Software and Compilers for Embedded Systems, 7th International Workshop, 2003

Highly scalable network on chip for reconfigurable systems.

T. Andrei Bartic, Jean-Yves Mignolet, Vincent Nollet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins

Proceedings of the 2003 International Symposium on System-on-Chip, 2003

Designing an Operating System for a Heterogeneous Reconfigurable So.

Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

A framework for mapping scalable networked applications on run-time reconfigurable platforms.

Nam Pham Ngoc, Gauthier Lafruit, Jean-Yves Mignolet, Serge Vernalde, Geert Deconinck, Rudy Lauwereins

Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003

Flexible system model and architectural exploration for HIPERLAN 2 DLC wireless LAN protocol.

Vivek Nema, Bart van Poucke, Miguel Glassee, Serge Vernalde

Proceedings of IEEE International Conference on Communications, 2003

Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems.

Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix.

Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Networks on Chip as Hardware Components of an OS for Reconfigurable Systems.

Théodore Marescaux, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms.

Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor

Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems.

Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor

Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003

Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems.

Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins

Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip.

Jean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins

Proceedings of the 2003 Design, 2003

Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling.

Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins

Proceedings of the 2003 Design, 2003

2002

Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects.

Yajun Ha, Serge Vernalde, Patrick Schaumont, Marc Engels, Rudy Lauwereins, Hugo De Man

J. Supercomput., 2002

DRESC: a retargetable compiler for coarse-grained reconfigurable architectures.

Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs.

Théodore Marescaux, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins

Proceedings of the Field-Programmable Logic and Applications, 2002

Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications.

Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man

Proceedings of the Field-Programmable Logic and Applications, 2002

Techniques to Evolve a C++ Based System Design Language.

Robert Pasko, Serge Vernalde, Patrick Schaumont

Proceedings of the 2002 Design, 2002

2001

High-performance flexible all-digital quadrature up and down converter chip.

Robert Pasko, Luc Rijnders, Patrick R. Schaumont, Serge A. Vernalde, Daniela Duracková

IEEE J. Solid State Circuits, 2001

Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware.

Yajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, Hugo De Man

Proceedings of the Field-Programmable Logic and Applications, 2001

A SW/HW Interface API for Java/FPGA Co-Designed Applets.

Yajun Ha, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Hardware/software partitioning of embedded system in OCAPI-xl.

Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens

Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001

Platform design approach for re-configurable network appliances.

Radim Cmar, Robert Pasko, Jean-Yves Mignolet, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

Virtual Java/FPGA interface for networked reconfiguration.

Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man

Proceedings of ASP-DAC 2001, 2001

2000

A Hardware Virtual Machine for the Networked Reconfiguration.

Yajun Ha, Patrick Schaumont, Marc Engels, Serge Vernalde, Freddy Potargent, Luc Rijnders, Hugo De Man

Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000

Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects.

Yajun Ha, Serge Vernalde, Patrick Schaumont, Marc Engels, Hugo De Man

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Functional verification of an embedded network component by co-simulation with a real network.

Robert Pasko, Radim Cmar, Patrick Schaumont, Serge Vernalde

Proceedings of the IEEE International High-Level Design Validation and Test Workshop 2000, 2000

1999

A new algorithm for elimination of common subexpressions.

Robert Pasko, Patrick Schaumont, Veerle Derudder, Serge Vernalde, Daniela Duracková

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement.

Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens

Proceedings of the 1999 Design, 1999

Hardware Reuse at the Behavioral Level.

Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens

Proceedings of the 36th Conference on Design Automation, 1999

A 10 Mbit/s Upstream Cable Modem with Automatic equalization.

Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels

Proceedings of the 36th Conference on Design Automation, 1999

1998

Low Power Digital Frequency Conversion Architectures.

Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens

J. VLSI Signal Process., 1998

A Technique for Combined Virtual Prototyping and Hardware Design.

Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens

Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998

A Programming Environment for the Design of Complex High Speed ASICs.

Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens

Proceedings of the 35th Conference on Design Automation, 1998

1997

Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications.

Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens

Proceedings of the European Design and Test Conference, 1997

Highly scalable parallel parametrizable architecture of the motion estimator.

Radim Cmar, Serge Vernalde

Proceedings of the European Design and Test Conference, 1997

1996

A Hilbert fractal codec for region oriented compression of color images.

Jan Bormans, Serge Vernalde, Jan Cornelis, Ivo Bolsens, Hugo De Man

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis.

Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens

Proceedings of the 33st Conference on Design Automation, 1996

1994

ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec.

Koen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk

Proceedings of the Proceedings EURO-DAC'94, 1994