Wan-Hsueh Cheng

According to our database, Wan-Hsueh Cheng authored at least 5 papers between 2017 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A 16Kb Antifuse One-Time-Programmable Memory in 5nm High-K Metal-Gate Fin-FET CMOS Featuring Bootstrap High Voltage Scheme, Read Endpoint Detection and Pseudo-Differential Sensing.

Shaun Chou, Gu-Huan Li, Shawn Chen, Jun-Hao Chang, Wan-Hsueh Cheng, Shao-Ding Wu, Philex Fan, Chia-En Huang, Yu-Der Chih, Yih Wang, Jonathan Chang

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2019

Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem.

Xin-Hong Qian, Yi-Chung Wu, Tzu-Yi Yang, Cheng-Hsiang Cheng, Hsing-Chien Chu, Wan-Hsueh Cheng, Ting-Yang Yen, Tzu-Han Lin, Yung-Jen Lin, Yu-Chi Lee, Jia-Heng Chang, Shih-Ting Lin, Shang-Hsuan Li, Tsung-Chen Wu, Chien-Chang Huang, Sung-Hao Wang, Chia-Fone Lee, Chia-Hsiang Yang, Chung-Chih Hung, Tai-Shih Chi, Chien-Hao Liu, Ming-Dou Ker, Chung-Yu Wu

IEEE Trans. Biomed. Eng., 2019

2018

A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control.

Cheng-Hsiang Cheng, Ping-Yuan Tsai, Tzu-Yi Yang, Wan-Hsueh Cheng, Ting-Yang Yen, Zhicong Luo, Xin-Hong Qian, Zhi-Xin Chen, Tzu-Han Lin, Wei-Hong Chen, Wei-Ming Chen, Sheng-Fu Liang, Fu-Zen Shaw, Cheng-Siu Chang, Yue-Loong Hsin, Chen-Yi Lee, Ming-Dou Ker, Chung-Yu Wu

IEEE J. Solid State Circuits, 2018

2017

Regulated Charge Pump With New Clocking Scheme for Smoothing the Charging Current in Low Voltage CMOS Process.

Zhicong Luo, Ming-Dou Ker, Wan-Hsueh Cheng, Ting-Yang Yen

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A Digitally Dynamic Power Supply Technique for 16-Channel 12 V-Tolerant Stimulator Realized in a 0.18- μm 1.8-V/3.3-V Low-Voltage CMOS Process.

Zhicong Luo, Ming-Dou Ker, Tzu-Yi Yang, Wan-Hsueh Cheng

IEEE Trans. Biomed. Circuits Syst., 2017