According to our database1, Wenqing Wu authored at least 21 papers between 2011 and 2019.
Legend:Book In proceedings Article PhD thesis Other
Cooperative knowledge creation in an uncertain network environment based on a dynamic knowledge supernetwork.
Entrepreneurial Team Learning, Forgetting and Knowledge Levels in Business Incubators: An Exploration and Exploitation Perspective.
J. Artificial Societies and Social Simulation, 2019
Analysis of novel FAGM(1, 1, tα) model to forecast health expenditure of China.
Grey Systems: T&A, 2019
Research on a novel fractional GM(α, n) model and its applications.
Grey Systems: T&A, 2019
Architecting Programmable Data Plane Defenses into the Network with FastFlex.
Proceedings of the 18th ACM Workshop on Hot Topics in Networks, 2019
Verification of Coprognosability in Decentralized Fault Prognosis of Labeled Petri Nets.
Proceedings of the 57th IEEE Conference on Decision and Control, 2018
Giant Spin-Hall assisted STT-RAM and logic design.
Asymmetry of hemispheric interdependences in the early hours following unilateral stroke: An electrophysiological study in rats.
Proceedings of the 2017 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2017
Array Organization and Data Management Exploration in Racetrack Memory.
IEEE Trans. Computers, 2016
Analysis of a repairable k-out-of-n: G system with repairman's multiple delayed vacations.
Int. J. Comput. Math., 2016
Spin-Hall Assisted STT-RAM Design and Discussion.
Proceedings of the 18th System Level Interconnect Prediction Workshop, 2016
Computation and profit analysis of a.
RAIRO - Operations Research, 2015
Computation and transient analysis of a k-out-of-n: G repairable system with general repair times.
Operational Research, 2015
Giant spin hall effect (GSHE) logic design for low power application.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Individually and socially optimal joining rules for an egalitarian processor-sharing queue under different information scenarios.
Comput. Ind. Eng., 2014
Cross-layer racetrack memory design for ultra high density and low power consumption.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Probabilistically Programmed STT-MRAM.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
A dual-mode architecture for fast-switching STT-RAM.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Probabilistic design methodology to improve run-time stability and performance of STT-RAM caches.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Multi retention level STT-RAM cache designs with a dynamic refresh scheme.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
A 1.0V 45nm nonvolatile magnetic latch design and its robustness analysis.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011