Yaman Umuroglu

According to our database, Yaman Umuroglu authored at least 25 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A2Q+: Improving Accumulator-Aware Weight Quantization.

Ian Colbert, Alessandro Pappalardo, Jakoba Petri-Koenig, Yaman Umuroglu

CoRR, 2024

2022

Elastic-DF: Scaling Performance of DNN Inference in FPGA Clouds through Automatic Partitioning.

Tobias Alonso, Lucian Petrica, Mario Ruiz, Jakoba Petri-Koenig, Yaman Umuroglu, Ioannis Stamelos, Elias Koromilas, Michaela Blott, Kees A. Vissers

ACM Trans. Reconfigurable Technol. Syst., 2022

RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures.

Felix Jentzsch, Yaman Umuroglu, Alessandro Pappalardo, Michaela Blott, Marco Platzner

IEEE Micro, 2022

Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark.

Hendrik Borras, Giuseppe Di Guglielmo, Javier M. Duarte, Nicolò Ghielmetti, Benjamin Hawks, Scott Hauck, Shih-Chieh Hsu, Ryan Kastner, Jason Liang, Andres Meza, Jules Muhizi, Tai Nguyen, Rushil Roy, Nhan Tran, Yaman Umuroglu, Olivia Weng, Aidan Yokuda, Michaela Blott

CoRR, 2022

QONNX: Representing Arbitrary-Precision Quantized Neural Networks.

Alessandro Pappalardo, Yaman Umuroglu, Michaela Blott, Jovan Mitrevski, Benjamin Hawks, Nhan Tran, Vladimir Loncar, Sioni Summers, Hendrik Borras, Jules Muhizi, Matthew Trahms, Shih-Chieh Hsu, Scott Hauck, Javier M. Duarte

CoRR, 2022

EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators.

Lois Orosa, Skanda Koppula, Yaman Umuroglu, Konstantinos Kanellopoulos, Juan Gómez-Luna, Michaela Blott, Kees A. Vissers, Onur Mutlu

CoRR, 2022

2021

Evaluation of Optimized CNNs on Heterogeneous Accelerators Using a Novel Benchmarking Approach.

Michaela Blott, Nicholas J. Fraser, Giulio Gambardella, Lisa Halder, Johannes Kath, Zachary Neveu, Yaman Umuroglu, Alina Vasilciuc, Miriam Leeser, Linda Doyle

IEEE Trans. Computers, 2021

Ps and Qs: Quantization-Aware Pruning for Efficient Low Latency Neural Network Inference.

Benjamin Hawks, Javier M. Duarte, Nicholas J. Fraser, Alessandro Pappalardo, Nhan Tran, Yaman Umuroglu

Frontiers Artif. Intell., 2021

2020

LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications.

Yaman Umuroglu, Yash Akhauri, Nicholas James Fraser, Michaela Blott

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach.

Michaela Blott, Johannes Kath, Lisa Halder, Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Miriam Leeser, Linda Doyle

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

High-Throughput DNN Inference with LogicNets.

Yaman Umuroglu, Yash Akhauri, Nicholas J. Fraser, Michaela Blott

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2019

Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing.

Yaman Umuroglu, Davide Conficconi, Lahiru Rasnayake, Thomas B. Preußer, Magnus Själander

ACM Trans. Reconfigurable Technol. Syst., 2019

2018

Accelerating Sparse Linear Algebra and Deep Neural Networks on Reconfigurable Platforms.

Yaman Umuroglu

PhD thesis, 2018

FINN-<i>R</i>: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks.

Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser, Kees A. Vissers

ACM Trans. Reconfigurable Technol. Syst., 2018

FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks.

Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu

CoRR, 2018

BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing.

Yaman Umuroglu, Lahiru Rasnayake, Magnus Själander

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017

Streamlined Deployment for Quantized Neural Networks.

Yaman Umuroglu, Magnus Jahre

CoRR, 2017

Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic.

Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Scaling Binarized Neural Networks on Reconfigurable Logic.

Nicholas J. Fraser, Yaman Umuroglu, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers

Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms, 2017

FINN: A Framework for Fast, Scalable Binarized Neural Network Inference.

Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Towards efficient quantized neural network inference on mobile devices: work-in-progress.

Yaman Umuroglu, Magnus Jahre

Proceedings of the 2017 International Conference on Compilers, 2017

2016

Random access schemes for efficient FPGA SpMV acceleration.

Yaman Umuroglu, Magnus Jahre

Microprocess. Microsystems, 2016

2015

Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platform.

Yaman Umuroglu, Donn Morrison, Magnus Jahre

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

A Vector Caching Scheme for Streaming FPGA SpMV Accelerators.

Yaman Umuroglu, Magnus Jahre

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

An energy efficient column-major backend for FPGA SpMV accelerators.

Yaman Umuroglu, Magnus Jahre

Proceedings of the 32nd IEEE International Conference on Computer Design, 2014