Thomas B. Preußer
Orcid: 0000-0003-3998-7896
According to our database1,
Thomas B. Preußer
authored at least 53 papers
between 1998 and 2023.
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Bibliography
2023
ACM Trans. Embed. Comput. Syst., November, 2023
Proc. VLDB Endow., 2023
CoRR, 2023
2022
2021
Computer, 2021
MicroRec: Efficient Recommendation Inference by Hardware and Data Structure Solutions.
Proceedings of Machine Learning and Systems 2021, 2021
2020
MicroRec: Accelerating Deep Recommendation Systems to Microseconds by Hardware and Data Structure Solutions.
CoRR, 2020
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
2019
ACM Trans. Reconfigurable Technol. Syst., 2019
Proceedings of the Echtzeit 2019 - Autonome Systeme, 2019
The CEDARtools Platform - Massive External Memory with High Bandwidth and Low Latency Under Fine-Granular Random Access Patterns.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019
2018
FINN-<i>R</i>: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks.
ACM Trans. Reconfigurable Technol. Syst., 2018
FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks.
CoRR, 2018
QBM - Mapping User-Specified Functions to Programmable Logic through a QBF Satisfiability Problem.
CoRR, 2018
Proceedings of the Membrane Computing, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Generic and universal parallel matrix summation with a flexible compression goal for Xilinx FPGAs.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
Implementation of an asynchronous bundled-data router for a GALS NoC in the context of a VSoC.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017
2016
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
2015
Proceedings of the 45. Jahrestagung der Gesellschaft für Informatik, Informatik, Energie und Umwelt, INFORMATIK 2015, Cottbus, Germany, September 28, 2015
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015
2014
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
2013
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
2012
Increasing the efficiency of an embedded multi-core bytecode processor using an object cache.
Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems, 2012
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
2011
Increasing the Performance and Predictability of the Code Execution on an Embedded Java Platform (Ansätze zur Steigerung der Leistungsfähigkeit und Vorhersagbarkeit der Codeausführung auf einer eingebetteten Java-Plattform).
PhD thesis, 2011
The Java Virtual Machine in retargetable, high-performance instruction set simulation.
Proceedings of the 9th International Conference on Principles and Practice of Programming in Java, 2011
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011
Proceedings of the 20th IEEE Symposium on Computer Arithmetic, 2011
2010
Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems, 2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
Enhancing FPGA Device Capabilities by the Automatic Logic Mapping to Additive Carry Chains.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the Architecture of Computing Systems, 2010
2009
High-Level Architecture Modelling Assisting the Processor Platform Development, Debugging and Simulation.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
2008
Java-Programmed Bootloading in Spite of Load-Time Code Patching on a Minimal Embedded Bytecode Processor.
Proceedings of the 2008 International Conference on Embedded Systems & Applications, 2008
2007
Proceedings of the 5th International Workshop on Java Technologies for Real-time and Embedded Systems, 2007
Proceedings of the 5th International Workshop on Java Technologies for Real-time and Embedded Systems, 2007
Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
2006
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006
2005
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005
2004
Proceedings of the Field Programmable Logic and Application, 2004
RECAST - Design Space Exploration for Dynamic Reconfigurable Embedded Computing.
Proceedings of the International Conference on Embedded Systems and Applications, 2004
1998
Proceedings of the Mustererkennung 1998, 20. DAGM-Symposium, Stuttgart, 29. September, 1998