Jack Sampson
Affiliations:- Pennsylvania State University, USA
According to our database1,
Jack Sampson
authored at least 110 papers
between 2005 and 2024.
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Online presence:
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on cse.psu.edu
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on dl.acm.org
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Bibliography
2024
An Efficient Edge-Cloud Partitioning of Random Forests for Distributed Sensor Networks.
IEEE Embed. Syst. Lett., March, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
2023
Assessing the Impact of Efficiently Protecting Ten Million Stack Objects from Memory Errors Comprehensively.
Proceedings of the IEEE Secure Development Conference, 2023
Proceedings of the 31st International Symposium on Modeling, 2023
Proceedings of the 21st USENIX Conference on File and Storage Technologies, 2023
2022
Seeker: Synergizing Mobile and Energy Harvesting Wearable Sensors for Human Activity Recognition.
CoRR, 2022
Proceedings of the 29th Annual Network and Distributed System Security Symposium, 2022
An architecture interface and offload model for low-overhead, near-data, distributed accelerators.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
Evaluation of Tradeoffs in the Design of FPGA Fabrics Using Electrostrictive 2-D FETs.
IEEE Trans. Very Large Scale Integr. Syst., 2021
MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators.
ACM Trans. Embed. Comput. Syst., 2021
Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021
Proceedings of the IEEE International Conference on Networking, Architecture and Storage, 2021
Origin: Enabling On-Device Intelligence for Human Activity Recognition Using Energy Harvesting Wireless Sensor Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
J. Signal Process. Syst., 2020
Optimization of Intercache Traffic Entanglement in Tagless Caches With Tiling Opportunities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Des. Test, 2020
D-SOAP: Dynamic Spatial Orientation Affinity Prediction for Caching in Multi-Orientation Memory Systems.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Emerging memories as enablers for in-memory layout transformation acceleration and virtualization.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Byzantine-Tolerant Inference in Distributed Deep Intelligent System: Challenges and Opportunities.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
IEEE Des. Test, 2019
Context-Aware Collaborative Object Recognition For Distributed Multi Camera Time Series Data.
Proceedings of the Tenth International Symposium on Information and Communication Technology, 2019
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Programmable Non-Volatile Memory Design Featuring Reconfigurable In-Memory Operations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Context-Aware Convolutional Neural Network over Distributed System in Collaborative Computing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
Compact 3-D-SRAM Memory With Concurrent Row and Column Data Access Capability Using Sequential Monolithic 3-D Integration.
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
IAA: Incidental Approximate Architectures for Extremely Energy-Constrained Energy Harvesting Scenarios using IoT Nonvolatile Processors.
IEEE Micro, 2018
Noise Aware Power Adaptive Partitioned Deep Networks for Mobile Visual Assist Platforms.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Stochastic Functional Verification of DNN Design through Progressive Virtual Dataset Generation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Conference on Consumer Electronics, 2018
Heuristic Approximation of Early-Stage CNN Data Representation for Vision Intelligence Systems.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018
2017
Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems.
ACM Trans. Embed. Comput. Syst., 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Always-On Speech Recognition Using TrueNorth, a Reconfigurable, Neurosynaptic Processor.
IEEE Trans. Computers, 2017
A Multitask Grocery Assist System for the Visually Impaired: Smart glasses, gloves, and shopping carts provide auditory and tactile feedback.
IEEE Consumer Electron. Mag., 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Evaluating tradeoffs in granularity and overheads in supporting nonvolatile execution semantics.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Co-training of Feature Extraction and Classification using Partitioned Convolutional Neural Networks.
Proceedings of the 54th Annual Design Automation Conference, 2017
Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs.
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Multi Scale Comput. Syst., 2016
Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power.
IEEE Micro, 2016
Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells.
ACM J. Emerg. Technol. Comput. Syst., 2016
Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures.
Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors.
ACM Trans. Archit. Code Optim., 2015
IEEE Micro, 2015
Proceedings of the 28th International Conference on VLSI Design, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Dynamic Machine Learning Based Matching of Nonvolatile Processor Microarchitecture to Harvested Energy Profile.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015
Visual co-occurrence network: using context for large-scale object recognition in retail.
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 2015 International Conference on Compilers, 2015
2014
Exploring Energy Scalability in Coprocessor-Dominated Architectures for Dark Silicon.
ACM Trans. Embed. Comput. Syst., 2014
Quality Time: A simple online technique for quantifying multicore execution efficiency.
Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014
EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
A hardware accelerated multilevel visual classifier for embedded visual-assist systems.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
TimeCube: A manycore embedded processor with interference-agnostic progress tracking.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
The GreenDroid Mobile Application Processor: An Architecture for Silicon's Dark Future.
IEEE Micro, 2011
QsCores: trading dark silicon for scalable energy efficiency with quasi-specific cores.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011
An Evaluation of Selective Depipelining for FPGA-Based Energy-Reducing Irregular Code Coprocessors.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011
2010
PhD thesis, 2010
Proceedings of the 2010 IEEE Hot Chips 22 Symposium, Stanford, CA, USA, August 22-24, 2010, 2010
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010
2006
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006
2005
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005