Yasuo Hidaka

According to our database1, Yasuo Hidaka authored at least 12 papers between 1991 and 2013.

Collaborative distances :
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2013
Design and Analysis of Energy-Efficient Reconfigurable Pre-Emphasis Voltage-Mode Transmitters.
J. Solid-State Circuits, 2013

A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

32Gb/s 28nm CMOS time-interleaved transmitter compatible with NRZ receiver with DFE.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 10Gb/s 10mW 2-tap reconfigurable pre-emphasis transmitter in 65nm LP CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
A 4-channel 10.3Gb/s transceiver with adaptive phase equalizer for 4-to-41dB loss PCB channel.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009
A 4-channel 10.3Gb/s backplane transceiver macro with 35dB equalizer and sign-based zero-forcing adaptive control.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007
A 4-Channel 3.1/10.3Gb/s Transceiver Macro with a Pattern-Tolerant Adaptive Equalizer.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Design Consideration of 6.25 Gbps Signaling for High-Performance Server.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

1994
Architecture of parallel management kernel for PIE64.
Future Generation Comp. Syst., 1994

1993
Multiple Threads in Cyclic Register Windows.
Proceedings of the 20th Annual International Symposium on Computer Architecture, 1993

1992
Architecture of Parallel Management Kernel for PIE64.
Proceedings of the PARLE '92: Parallel Architectures and Languages Europe, 1992

1991
A Static Load Partitioning Method based on Execution Profile for Committed Choice Languages.
Proceedings of the Logic Programming, Proceedings of the 1991 International Symposium, San Diego, California, USA, Oct. 28, 1991


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