Yen-Ning Chiang

According to our database1, Yen-Ning Chiang authored at least 7 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A ReRAM Macro Using Dynamic Trip-Point-Mismatch Sampling Current-Mode Sense Amplifier and Low-DC Voltage-Mode Write-Termination Scheme Against Resistance and Write-Delay Variation.
IEEE J. Solid State Circuits, 2019

2018
A 28nm 32Kb embedded 2T2MTJ STT-MRAM macro with 1.3ns read-access time for fast and reliable read applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
A Flexible Wildcard-Pattern Matching Accelerator via Simultaneous Discrete Finite Automata.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing.
IEEE J. Solid State Circuits, 2017

2016
A ReRAM-Based 4T2R Nonvolatile TCAM Using RC-Filtered Stress-Decoupled Scheme for Frequent-OFF Instant-ON Search Engines Used in IoT and Big-Data Processing.
IEEE J. Solid State Circuits, 2016

7.4 A 256b-wordlength ReRAM-based TCAM with 1ns search-time and 14× improvement in wordlength-energyefficiency-density product using 2.5T1R cell.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016


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