Chia-Chen Kuo

According to our database1, Chia-Chen Kuo authored at least 31 papers between 2001 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Quickest Multistate Flow Networks With the Deterioration Effect.
IEEE Access, 2020

On Construction and Performance Evaluation of a Virtual Desktop Infrastructure With GPU Accelerated.
IEEE Access, 2020

Fitness Evaluation of Military Helmet Pad.
Proceedings of the Digital Human Modeling and Applications in Health, Safety, Ergonomics and Risk Management. Posture, Motion and Health, 2020

2019
High-performance Computing for Visual Simulations and Rendering.
J. Robotics Netw. Artif. Life, 2019

A Cloud Service Framework for Virtual Try-On of Footwear in Augmented Reality.
J. Comput. Inf. Sci. Eng., 2019

2017
A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing.
IEEE J. Solid State Circuits, 2017

2016
A ReRAM-Based 4T2R Nonvolatile TCAM Using RC-Filtered Stress-Decoupled Scheme for Frequent-OFF Instant-ON Search Engines Used in IoT and Big-Data Processing.
IEEE J. Solid State Circuits, 2016

Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

New results on connectivity in wireless network.
J. Vis. Commun. Image Represent., 2015

RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications.
Proceedings of the Symposium on VLSI Circuits, 2015

Feature tracking using epipolar geometry for ego-motion estimation.
Proceedings of the 2015 International Conference on Image and Vision Computing New Zealand, 2015

17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Read circuits for resistive memory (ReRAM) and memristor-based nonvolatile Logics.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Power saving on mobile devices through contrast-aware backlight control.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2015

2014
Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme.
IEEE J. Solid State Circuits, 2014

ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing.
Proceedings of the Symposium on VLSI Circuits, 2014

Milkcrown simulation using OpenACC accelerated framework.
Proceedings of the SIGGRAPH Asia 2014 Posters, Shenzhen, China, December 3-6, 2014, 2014

Heartbeat measurement based on laser speckle fingerprint.
Proceedings of the Intelligent Systems and Applications, 2014

Rain Removal Using Single Image based on Non-negative Matrix Factorization.
Proceedings of the Intelligent Systems and Applications, 2014

A nonvolatile look-up table using ReRAM for reconfigurable logic.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013
A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro.
IEEE J. Solid State Circuits, 2013

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes.
IEEE J. Solid State Circuits, 2013

2012
A new vision for modern dance in terms of dynamics.
Proceedings of the SIGGRAPH Asia 2012 Poster Proceedings, Singapore, Singapore, November 28, 2012

A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2004
Adaptive transmission control for error-resilient multimedia synchronization.
IEEE Trans. Consumer Electron., 2004

Multimedia Over IP for Thin Clients: Building a Collaborative Resource-Sharing Prototype.
Concurr. Eng. Res. Appl., 2004

DDS: an efficient dynamic dimension selection algorithm for nearest neighbor search in high dimensions.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

2002
Design and Implementation of a Network Application Architecture for Thin Clients.
Proceedings of the 26th International Computer Software and Applications Conference (COMPSAC 2002), 2002

2001
An Adaptive Transmission Scheme for Audio and Video Synchronization based on Real-time Transport Protocol.
Proceedings of the 2001 IEEE International Conference on Multimedia and Expo, 2001


  Loading...