Wei-Yu Lin

Orcid: 0000-0002-9267-7988

According to our database1, Wei-Yu Lin authored at least 15 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Temporal Difference-Aware Graph Convolutional Reinforcement Learning for Multi-Intersection Traffic Signal Control.
IEEE Trans. Intell. Transp. Syst., January, 2024

2021
Detection of quantitative trait loci from RNA-seq data with or without genotypes using BaseQTL.
Nat. Comput. Sci., 2021

2020
Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.
IEEE J. Solid State Circuits, 2020

2019
The central roles of embeddedness and engagement in virtual communities.
Online Inf. Rev., 2019

A ReRAM Macro Using Dynamic Trip-Point-Mismatch Sampling Current-Mode Sense Amplifier and Low-DC Voltage-Mode Write-Termination Scheme Against Resistance and Write-Delay Variation.
IEEE J. Solid State Circuits, 2019

A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

Deep Learning-Based Obstacle Detection and Depth Estimation.
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019

Automated optical inspection for abnormal-shaped packages.
Proceedings of the Intelligent Robotics and Industrial Applications using Computer Vision 2019, 2019

2018
A 28nm 32Kb embedded 2T2MTJ STT-MRAM macro with 1.3ns read-access time for fast and reliable read applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A Neuromorphic Computing System for Bitwise Neural Networks Based on ReRAM Synaptic Array.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

2017
Circuit design for beyond von Neumann applications using emerging memory: From nonvolatile logics to neuromorphic computing.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Wireless heterogeneous network integration technology.
Proceedings of the 2nd International Conference on Multimedia Systems and Signal Processing, 2017

Challenges of emerging memory and memristor based circuits: Nonvolatile logics, IoT security, deep learning and neuromorphic computing.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2010
Dynamic Auction Mechanism for Cloud Resource Allocation.
Proceedings of the 10th IEEE/ACM International Conference on Cluster, 2010


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