Yeonbok Lee

According to our database1, Yeonbok Lee authored at least 9 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
AIX: A high performance and energy efficient inference accelerator on FPGA for a DNN-based commercial speech recognition.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Online Speech Dereverberation Using RLS-WPE Based on a Full Spatial Correlation Matrix Integrated in a Speech Enhancement System.
Proceedings of the 16th International Workshop on Acoustic Signal Enhancement, 2018

2017
A space- and energy-efficient code Compression/Decompression technique for coarse-grained reconfigurable architectures.
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017

2014
Software-based giga-bit WLAN platform.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

Scalable radio processor architecture for modern wireless communications.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

2011
An Automatic Method of Mapping I/O Sequences of Chip Execution onto High-level Design for Post-Silicon Debugging.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

On-chip dynamic signal sequence slicing for efficient post-silicon debugging.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Generation of I/O sequences for a high-level design from those in post-silicon for efficient post-silicon debugging.
Proceedings of the 28th International Conference on Computer Design, 2010

2009
A Post-Silicon Debug Support Using High-Level Design Description.
Proceedings of the Eighteentgh Asian Test Symposium, 2009


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