Yunlong Liu

Orcid: 0009-0006-4586-2052

Affiliations:
  • Anhui University, Hefei, China


According to our database1, Yunlong Liu authored at least 8 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Analysis and Design of Memory Testing Algorithm for Computing-in-Memory Using MBIST.
ACM J. Emerg. Technol. Comput. Syst., April, 2026

30.4 A 28nm 106.85TOPS/W and 77.68TFLOPS/W CIM Macro with Stage-Wise-Enabled Lossless Compressors Based on Sign-Bit-Embedded Transition-Counting-Lines for Edge-AI Devices.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026

Improving MAC Accuracy of Pre-Aligned Floating-Point CIM Macros for Compound AI with Statistical Group Features.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
A 0.000159 mm2 2.9 μm-pitch 4.3fJ/Conv 6-bit SAR ADC for high throughput parallel readout of analog SRAM computing-in-memory.
Microelectron. J., 2025

2024
Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design.
IEEE Trans. Very Large Scale Integr. Syst., May, 2024

A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

Configurable in-memory computing architecture based on dual-port SRAM.
Microelectron. J., 2024

SRAM-Based Digital CIM Macro for Linear Interpolation and MAC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024


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