Alhad Daftardar
Orcid: 0000-0001-8523-6490
According to our database1,
Alhad Daftardar
authored at least 9 papers
between 2019 and 2025.
Collaborative distances:
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Bibliography
2025
CoRR, August, 2025
CoRR, July, 2025
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025
2024
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024
2022
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory.
IEEE J. Solid State Circuits, 2022
Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2020
Hardware Root-of-Trust-based integrity for shared library function pointers in embedded systems.
Microprocess. Microsystems, 2020
2019
Hardware Root-of-Trust Based Integrity for Shared Library Function Pointers in Embedded Systems.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019