Andrea Gerosa
Orcid: 0000-0002-3395-8034
According to our database1,
Andrea Gerosa
authored at least 52 papers
between 1996 and 2023.
Collaborative distances:
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Bibliography
2023
IEEE Trans. Educ., April, 2023
2019
A Multi-Phase Self-Reconfigurable Switched-Capacitor DC-DC Step-Up Converter Integrated in CMOS Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2016
A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2012
Integrated SFCW Transceivers for UWB Breast Cancer Imaging: Architectures and Circuit Constraints.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
2011
IEEE J. Solid State Circuits, 2011
Integrated transceivers for UWB breast cancer imaging: Architecture and circuit constraints.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
IEEE J. Solid State Circuits, 2010
A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems.
IEEE J. Solid State Circuits, 2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2008
IEEE J. Solid State Circuits, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
A 0.13μm CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 μm CMOS.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
2006
Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code.
IEEE Trans. Commun., 2006
An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Sigma Delta Modulator and a Flash Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
An optimal architecture for a multimode ADC, based on the cascade of a Sigma Delta modulator and a flash converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency.
Proceedings of the 13th IEEE International Conference on Electronics, 2006
A 0.35 μm SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection.
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006
2005
A 1.8-μW sigma-delta modulator for 8-bit digitization of cardiac signals in implantable pacemakers operating down to 1.8 V.
IEEE Trans. Circuits Syst. II Express Briefs, 2005
IEEE J. Solid State Circuits, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of IEEE International Conference on Communications, 2005
2004
A fully integrated dual-channel log-domain programmable preamplifier and filter for an implantable cardiac pacemaker.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
A fully integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers.
IEEE J. Solid State Circuits, 2004
Proceedings of the 2004 IEEE International Symposium on Information Theory, 2004
A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Analog CMOS implementation of Gallager's iterative decoding algorithm applied to a block turbo code.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Performance optimization in micro-power, low-voltage log-domain filters in pure CMOS technology.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
A very low-power 8-bit Sigma-Delta converter in a 0.8µm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
A ready-to-use design procedure for operational transconductance amplifiers that minimizes power consumption.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
Low-power sensing and digitization of cardiac signals based on sigma-delta conversion (poster session).
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
1996
Proceedings of the 8th European Signal Processing Conference, 1996