Andy Lambrechts

According to our database1, Andy Lambrechts authored at least 24 papers between 2004 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Convolutional Neural Networks For Heterogeneous Ingredient Discrimination With Hyperspectral Imaging.
Proceedings of the 10th Workshop on Hyperspectral Imaging and Signal Processing: Evolution in Remote Sensing, 2019

Spectral Shift Correction for Fabry-Perot Based Spectral Cameras.
Proceedings of the 10th Workshop on Hyperspectral Imaging and Signal Processing: Evolution in Remote Sensing, 2019

CSIMBA: Towards a Smart-Spectral Cubesat Constellation.
Proceedings of the 2019 IEEE International Geoscience and Remote Sensing Symposium, 2019

2016
Characterization of VNIR Hyperspectral Sensors with Monolithically Integrated Optical Filters.
Proceedings of the Image Sensors and Imaging Systems 2016, 2016

2014
Linear variable filters - A camera system requirement analysis for hyperspectral imaging sensors onboard small Remotely Piloted Aircraft Systems.
Proceedings of the 6th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2014

Spatially variable filters - Expanding the spectral dimension of compact cameras for remotely piloted aircraft systems.
Proceedings of the 2014 IEEE Geoscience and Remote Sensing Symposium, 2014

2013
Coarse-Grained Reconfigurable Array Architectures.
Proceedings of the Handbook of Signal Processing Systems, 2013

2010
Coarse-Grained Reconfigurable Array Architectures.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Energy-performance Exploration of a CGA-based SDR Processor.
J. Signal Process. Syst., 2009

Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Playing the trade-off game: Architecture exploration using Coffeee.
ACM Trans. Design Autom. Electr. Syst., 2009

Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures.
IEEE Trans. Computers, 2009

EMPIRE: Empirical power/area/timing models for register files.
Microprocess. Microsystems, 2009

Locality optimization in a compiler for wireless applications.
Des. Autom. Embed. Syst., 2009

2008
Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Coffee: COmpiler Framework for Energy-Aware Exploration.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008

Scenario-Based Fixed-point Data Format Refinement to Enable Energy-scalable Software Defined Radios.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Very wide register: an asymmetric register file organization for low power embedded processors.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Locality optimization in wireless applications.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors.
Proceedings of the Architecture of Computing Systems, 2007

2006
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Architecture Exploration for a Reconfigurable Architecture Template.
IEEE Des. Test Comput., 2005

Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004
Design Style Case Study for Embedded Multi Media Compute Nodes.
Proceedings of the 25th IEEE Real-Time Systems Symposium (RTSS 2004), 2004


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