Arnout Vandecappelle

According to our database1, Arnout Vandecappelle authored at least 20 papers between 1999 and 2009.

Collaborative distances:



In proceedings 
PhD thesis 




Design and Tool Flow of Multimedia MPSoC Platforms.
Signal Processing Systems, 2009

System-scenario-based design of dynamic embedded systems.
ACM Trans. Design Autom. Electr. Syst., 2009

Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications.
Signal Processing Systems, 2008

Storage Estimation and Design Space Exploration Methodologies for the Memory Management of Signal Processing Applications.
Signal Processing Systems, 2008

The formalism underlying EASYMAP.
Sci. Comput. Program., 2008

System-Level Design and Application Mapping for Wireless and Multimedia MPSoC Architectures.
Proceedings of the Design, Automation and Test in Europe, 2008

Incremental hierarchical memory size estimation for steering of loop transformations.
ACM Trans. Design Autom. Electr. Syst., 2007

Fast memory footprint estimation based on maximal dependency vector calculation.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Locality optimization in wireless applications.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Hierarchical memory size estimation for loop fusion and loop shifting in data-dominated applications.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Loop Transformation Methodologies for Array-Oriented Memory Management.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

Optimised Mapping of the QSDPCM Video Codec on MPARM: Shared Bus is not the Bottleneck.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2005

Memory-access-aware data structure transformations for embedded software with dynamic data accesses.
IEEE Trans. VLSI Syst., 2004

Data and memory optimization techniques for embedded systems.
ACM Trans. Design Autom. Electr. Syst., 2001

Data Memory Organization and Optimizations in Application-Specific Systems.
IEEE Design & Test of Computers, 2001

System-level interconnect architecture exploration for custom memory organizations.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Low Power Storage Cycle Budget Distribution Tool Support for Hierarchical Graphs.
Proceedings of the 13th International Symposium on System Synthesis, 2000

Systematic cycle budget versus system power trade-off: a new perspective on system exploration of real-time data-dominated applications.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback.
Proceedings of the 36th Conference on Design Automation, 1999