Ashok Mehta

According to our database, Ashok Mehta authored at least 4 papers between 2012 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application.

Mu-Shan Lin, Chien-Chun Tsai, Chih-Hsien Chang, Wen-Hung Huang, Ying-Yu Hsu, Shu-Chun Yang, Chin-Ming Fu, Mao-Hsuan Chou, Tien-Chien Huang, Ching-Fang Chen, Tze-Chiang Huang, Saman Adham, Min-Jer Wang, William Wu Shen, Ashok Mehta

IEEE J. Solid State Circuits, 2014

Design-for-diagnosis: Your safety net in catching design errors in known good dies in CoWoS^TM/3D ICs.

Sandeep Kumar Goel, Min-Jer Wang, Saman Adham, Ashok Mehta, Frank Lee

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

2013

Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study.

Sandeep Kumar Goel, Saman Adham, Min-Jer Wang, Ji-Jan Chen, Tze-Chiang Huang, Ashok Mehta, Frank Lee, Vivek Chickermane, Brion L. Keller, Thomas Valind, Subhasish Mukherjee, Navdeep Sood, Jeongho Cho, Hayden Hyungdong Lee, Jungi Choi, Sangdoo Kim

Proceedings of the 2013 IEEE International Test Conference, 2013

2012

DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks.

Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen

Proceedings of the 2012 IEEE International Test Conference, 2012