Atsushi Muramatsu
According to our database1,
Atsushi Muramatsu
authored at least 7 papers
between 1989 and 2017.
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Bibliography
2017
A Thin, Compact and Maintenance-Free Beacon Transmitter Operating from a 44-lux Photovoltaic Film Harvester.
IEICE Trans. Electron., 2017
2012
24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in V<sub>DDmin</sub> limited ultra low voltage logic circuits.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
2011
Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 voltage domains.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
2005
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
1989
Syst. Comput. Jpn., 1989