Bruno Forlin

According to our database, Bruno Forlin authored at least 13 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2023

Plug N' PIM: An integration strategy for Processing-in-Memory accelerators.

Paulo C. Santos, Bruno E. Forlin, Marco A. Z. Alves, Luigi Carro

Integr., 2023

An unprotected RISC-V Soft-core processor on an SRAM FPGA: Is it as bad as it sounds?

Bruno E. Forlin, Wouter van Huffelen, Carlo Cazzaniga, Paolo Rech, Nikolaos Alachiotis, Marco Ottavi

Proceedings of the IEEE European Test Symposium, 2023

Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs.

Kevin Böhmer, Bruno Forlin, Carlo Cazzaniga, Paolo Rech, Gianluca Furano, Nikolaos Alachiotis, Marco Ottavi

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2022

Sim2PIM: A complete simulation framework for Processing-in-Memory.

Bruno E. Forlin, Paulo C. Santos, Augusto E. Becker, Marco A. Z. Alves, Luigi Carro

J. Syst. Archit., 2022

Aggressive Performance Improvement on Processing-in-Memory Devices by Adopting Hugepages.

Paulo Cesar Santos, Bruno E. Forlin, Marco A. Z. Alves, Luigi Carro

Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022

2021

Sim2PIM: A Fast Method for Simulating Host Independent & PIM Agnostic Designs.

Paulo C. Santos, Bruno E. Forlin, Luigi Carro

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Providing Plug N' Play for Processing-in-Memory Accelerators.

Paulo C. Santos, Bruno E. Forlin, Luigi Carro

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs.

Cezar Reinbrecht, Abdullah Aljuffri, Said Hamdioui, Mottaqiallah Taouil, Bruno Forlin, Johanna Sepúlveda

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

G-PUF: An Intrinsic PUF Based on GPU Error Signatures.

Bruno Forlin, Ronaldo Husemann, Luigi Carro, Cezar Reinbrecht, Said Hamdioui, Mottaqiallah Taouil

Proceedings of the IEEE European Test Symposium, 2020

2019

Cache timing attacks on NoC-based MPSoCs.

Cezar Reinbrecht, Bruno Forlin, Johanna Sepúlveda

Microprocess. Microsystems, 2019

Security Aspects of Real-Time MPSoCs: The Flaws and Opportunities of Preemptive NoCs.

Bruno Forlin, Cezar Reinbrecht, Johanna Sepúlveda

Proceedings of the VLSI-SoC: New Technology Enabler, 2019

Attacking Real-time MPSoCs: Preemptive NoCs are Vulnerable.

Bruno Forlin, Cezar Reinbrecht, Johanna Sepúlveda

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

2018

Earthquake - A NoC-based optimized differential cache-collision attack for MPSoCs.

Cezar Reinbrecht, Bruno Forlin, Andreas Zankl, Johanna Sepúlveda

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018