Gengsheng Chen
Orcid: 0000-0001-5377-0410
According to our database1,
Gengsheng Chen authored at least 35 papers
between 2008 and 2026.
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Bibliography
2026
MoEA: A Mixture of Experts Accelerator with Direct Token Access and Dynamic Expert Scheduling.
Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026
2025
Design and Evaluation of a Radiation-Hardened FDSOI SRAM With High-Reliable Elements and Power Management Circuits for Space Application.
IEEE Trans. Aerosp. Electron. Syst., April, 2025
IEEE Access, 2025
RUNoC: Re-inject into the Underground Network to Alleviate Congestion in Large-Scale NoC.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
2024
PAIR: Periodically Alternate the Identity of Routers to Ensure Deadlock Freedom in NoC.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
Sci. China Inf. Sci., 2022
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Real-Time Image Inpainting using PatchMatch Based Two-Generator Adversarial Networks with Optimized Edge Loss Function.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Characterization of Single Event Upsets of Nanoscale FDSOI Circuits Based on the Simulation and Irradiation Results.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
Improving Topology Consistency of Retinal Vessel Segmentation via a Double U-Net with Asymmetric Convolution.
Proceedings of 2021 International Conference on Medical Imaging and Computer-Aided Diagnosis, 2021
EG-HRNet: An Efficient High-Resolution Network Using Ghost-Modules for Human Pose Estimation.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
A Hierarchical Fault Injection System for RISC-V Processors Targeting Single Event Upsets in Flip-Flops.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
ASAN: Self-Attending and Semantic Activating Network towards Better Object Detection.
IEICE Trans. Inf. Syst., 2020
IEEE Access, 2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and Implementation.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
IEICE Trans. Inf. Syst., 2019
A Coarse-to-fine Classification for Motion Blur Kernel Size Estimation with Cascaded Neural Networks.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2017
Roles of the gate length and width of the transistors in increasing the single event upset resistance of SRAM cells.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2012
SSTA Scheme for Multiple Input Switching Case Based on Stochastic Collocation Method.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012
2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
Variational Capacitance Extraction and Modeling Based on Orthogonal Polynomial Method.
IEEE Trans. Very Large Scale Integr. Syst., 2010
Energy and delay-aware mapping for real-time digital processing system on network on chip platforms.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008