Samuel Spetalnick
Orcid: 0000-0003-1627-9002
According to our database1,
Samuel Spetalnick
authored at least 20 papers
between 2020 and 2024.
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Bibliography
2024
A Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Fused Frame and Event-Based Target Identification and Tracking.
IEEE J. Solid State Circuits, January, 2024
30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A 2.38 MCells/mm<sup>2</sup> 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop Mitigation.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 73.53TOPS/W 14.74TOPS Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Hybrid Frame and Event-Based Target Tracking.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Live Demonstration: Hybrid RRAM and SRAM SoC for Fused Frame and Event Target Tracking.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 40nm 64kb 26.56TOPS/W 2.37Mb/mm<sup>2</sup>RRAM Binary/Compute-in-Memory Macro with 4.23x Improvement in Density and >75% Use of Sensing Dynamic Range.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 40nm 60.64TOPS/W ECC-Capable Compute-in-Memory/Digital 2.25MB/768KB RRAM/SRAM System with Embedded Cortex M3 Microprocessor for Edge Recommendation Systems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
IEEE Des. Test, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
CIM-SECDED: A 40nm 64Kb Compute In-Memory RRAM Macro with ECC Enabling Reliable Operation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
Counting Cards: Exploiting Weight and Variance Distributions for Robust Compute In-Memory.
CoRR, 2020
Proceedings of the VLSI-SoC: Design Trends, 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
A Miniature Wireless Silicon-on-Insulator Image Sensor for Brain Fluorescence Imaging.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020