Claudionor José Nunes Coelho Jr.
Orcid: 0000-0001-9637-1890Affiliations:
- Palo Alto Networks
- Federal University of Minas Gerais, Belo Horizonte, Brazil
According to our database1,
Claudionor José Nunes Coelho Jr.
authored at least 54 papers
between 1992 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
ACM Trans. Embed. Comput. Syst., November, 2023
2022
2021
Automatic heterogeneous quantization of deep neural networks for low-latency inference on the edge for particle detectors.
Nat. Mach. Intell., 2021
Log2NS: Enhancing Deep Learning Based Analysis of Logs With Formal to Prevent Survivorship Bias.
CoRR, 2021
Proceedings of the Machine Learning, Optimization, and Data Science, 2021
2020
Ultra Low-latency, Low-area Inference Accelerators using Heterogeneous Deep Quantization with QKeras and hls4ml.
CoRR, 2020
2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
2012
Int. J. Softw. Tools Technol. Transf., 2012
2011
Proceedings of the 12th Latin American Test Workshop, 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
2009
BugTracer: A system for integrated circuit development tracking and statistics retrieval.
Proceedings of the 10th Latin American Test Workshop, 2009
Proceedings of the 46th Design Automation Conference, 2009
2008
Decision heuristic for Davis Putnam, Loveland and Logemann algorithm satisfiability solving based on cube subtraction.
IET Comput. Digit. Tech., 2008
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008
2007
Proceedings of the 12th IEEE Symposium on Computers and Communications (ISCC 2007), 2007
Proceedings of IEEE International Conference on Communications, 2007
SAT-Based Equivalence Checking Based on Circuit Partitioning and Special Approaches for Conflict Clause Reuse.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007
Proceedings of the 21st International Conference on Advanced Information Networking and Applications (AINA 2007), 2007
2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
System-level Dynamic Power Management Techniques for Communication Intensive Devices.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006
Cube Subtraction in SAT Solvers.
Proceedings of the 7th Latin American Test Workshop, 2006
Proceedings of the 11th IEEE Symposium on Computers and Communications (ISCC 2006), 2006
2005
Dynamic Power Management in Wireless Sensor Networks: An Application-Driven Approach.
Proceedings of the 2nd International Conference on Wireless on Demand Network Systems and Service (WONS 2005), 2005
2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
2003
The Chip is Ready. Am I done? On-chip Verification using Assertion Processors.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Proceedings of the VLSI-SOC: From Systems to Chips, 2003
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003
BeanWatcher: A Tool to Generate Multimedia Monitoring Applications for Wireless Sensor Networks.
Proceedings of the Management of Multimedia Networks and Services, 2003
Network-Based Distributed Systems Middleware.
Proceedings of the International Middleware Conference, 2003
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003
2001
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001
A FPGA Implementation of a DCT-Based Digital Electrocardiographic Signal Compression Device.
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001
2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
Proceedings of the 1st IEEE International Symposium on Bioinformatics and Biomedical Engineering, 2000
1999
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999
1998
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998
1996
Analysis and synthesis of concurrent digital circuits using control-flow expressions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Proceedings of the 9th International Symposium on System Synthesis, 1996
Proceedings of the conference on European design automation, 1996
1994
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994
1993
IEEE Trans. Very Large Scale Integr. Syst., 1993
1992
Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components.
Proceedings of the 29th Design Automation Conference, 1992