Dan Moy

According to our database, Dan Moy authored at least 6 papers between 2007 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Self-aligned Fiber Attach on Monolithic Silicon Photonic Chips: Moisture Effect and Hermetic Seal.

Zhuo-Jie Wu, Ping-Chuan Wang, Seungman Choi, Patrick Justison, Martin Gall, Jae Kyu Cho, Takako Hirokawa, Yusheng Bian, Thomas Houghton, Vaishnavi Karra, Dan Moy, Karen Nummy, Dave Riggs, Norman Robson, Ian Melville, Ken Giewont

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

Polarization mode dispersion in CMOS-integrated monolithic SiPh components: simulations and experiments.

Yusheng Bian, Hanyi Ding, Abdelsalam Aboketaf, Vaishnavi Karra, Massimo Sorbara, Takako Hirokawa, Salman Mosleh, Crystal Hedges, Won Suk Lee, Sujith Chandran, Avijit Chatterjee, Riddhi Nandi, Ken Giewont, Karen Nummy, Alon Gabbay, Yannick De Koninck, Jochem Verbist, Santiago Echeverri, Liron Gantz, Qidi Liu, Dylan Logan, Omid Jafari, Kyle Murray, Edgar Huante-Ceron, Subharup Roy, Paul Webster-Pact, Michal Rakowski, Kevin K. Dezfulian, Andy Stricker, Thomas Houghton, Keith Donegan, Ryan Sporer, Jae Kyu Cho, Farid Barakat, Dan Moy, Zhuo-Jie Wu, Subramanian Krishnamurthy, Arman Najafi, Seyedeh Fahimeh Banihashemian, Rick Mincar, Ranjani Sirdeshmukh, Norman Robson, Ian Melville, Rod Augur, Jae Gon Lee, Wenhe Lin, George Gifford, Robert Fox, Vikas Gupta, Anthony Yu, John Pellerin, Ted Letavic

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

2018

80-kb Logic Embedded High-K Charge Trap Transistor-Based Multi-Time-Programmable Memory With No Added Process Complexity.

Balaji Jayaraman, Derek Leu, Janakiraman Viraraghavan, Alberto Cestero, Ming Yin, John Golz, Rajesh Reddy Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian S. Iyer

IEEE J. Solid State Circuits, 2018

2016

80Kb 10ns read cycle logic Embedded High-K charge trap Multi-Time-Programmable Memory scalable to 14nm FIN with no added process complexity.

Janakiraman Viraraghavan, Derek Leu, Balaji Jayaraman, Alberto Cestero, Robert Kilker, Ming Yin, John Golz, Rajesh Reddy Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian S. Iyer

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015

Oxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications.

Chandrasekharan Kothandaraman, X. Chen, Dan Moy, D. Lea, Sami Rosenblatt, Faraz Khan, Derek Leu, Toshiaki Kirihata, D. Ioannou, Giuseppe La Rosa, J. B. Johnson, Norman Robson, Subramanian S. Iyer

Proceedings of the IEEE International Reliability Physics Symposium, 2015

2007

Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips.

Norman Robson, John Safran, Chandrasekharan Kothandaraman, Alberto Cestero, Xiang Chen, Raj Rajeevakumar, Alan Leslie, Dan Moy, Toshiaki Kirihata, Subramanian S. Iyer

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007