Enrique Barajas

Orcid: 0000-0002-2072-2268

According to our database1, Enrique Barajas authored at least 16 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2023
Aging Compensation in a Class-A High-Frequency Amplifier with DC Temperature Measurements.
Sensors, August, 2023

2022
Potential of functional analysis applied to Sentinel-2 time-series to assess relevant agronomic parameters at the within-field level in viticulture.
Comput. Electron. Agric., 2022

2021
BPF-Based Thermal Sensor Circuit for On-Chip Testing of RF Circuits.
Sensors, 2021

2020
Experimental Monitoring of Aging in CMOS RF Linear Power Amplifiers: Correlation Between Device and Circuit Degradation.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Output Power and Gain Monitoring in RF CMOS Class A Power Amplifiers by Thermal Imaging.
IEEE Trans. Instrum. Meas., 2019

Differential Temperature Sensors: Review of Applications in the Test and Characterization of Circuits, Usage and Design Methodology.
Sensors, 2019

A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI.
IEEE J. Solid State Circuits, 2019

Aging in CMOS RF Linear Power Amplifiers: Experimental Comparison and Modeling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

On the Use of Built-In Temperature Sensors to Monitor Aging in RF Circuits.
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2018
Analysis of Body Bias and RTN-Induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

2017
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging.
Proceedings of the 14th International Conference on Synthesis, 2017

2014
Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2010
Behavioural Modelling of DLLs for Fast Simulation and Optimisation of Jitter and Power Consumption.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2007
Interactive presentation: Behavioral modeling of delay-locked loops and its application to jitter optimization in ultra wide-band impulse radio systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2005
Characterization and noise analysis of a 12-bit current steering digital-to-analog converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Discrete and continuous substrate noise spectrum dependence on digital circuit characteristics.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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