Peyman Pouyan

According to our database, Peyman Pouyan authored at least 17 papers between 2011 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2018

Memristive Crossbar Memory Lifetime Evaluation and Reconfiguration Strategies.

Peyman Pouyan, Esteve Amat, Antonio Rubio

IEEE Trans. Emerg. Top. Comput., 2018

State of the art and challenges for test and reliability of emerging nonvolatile resistive memories.

Elena Ioana Vatajelu, Peyman Pouyan, Said Hamdioui

Int. J. Circuit Theory Appl., 2018

2017

Resistive Random Access Memory Variability and Its Mitigation Schemes.

Peyman Pouyan, Esteve Amat, Said Hamdioui, Antonio Rubio

J. Low Power Electron., 2017

Reliability issues in RRAM ternary memories affected by variability and aging mechanisms.

Antonio Rubio, Manuel Escudero, Peyman Pouyan

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Standards-based tools and services for building lifelong learning pathways.

Cleo Sgouropoulou, Ioannis Voyiatzis, Anastasios Koutoumanos, Said Hamdioui, Peyman Pouyan, M. Comte, Paolo Prinetto, Giuseppe Airo Farulla, Peeter Ellervee, Carlos Delgado Kloos, Raquel M. Crespo García

Proceedings of the 2017 IEEE Global Engineering Education Conference, 2017

Test and Reliability of Emerging Non-volatile Memories.

Said Hamdioui, Peyman Pouyan, Huawei Li, Ying Wang, Arijit Raychowdhury, Insik Yoon

Proceedings of the 26th IEEE Asian Test Symposium, 2017

2016

RRAM variability and its mitigation schemes.

Peyman Pouyan, Esteve Amat, Said Hamdioui, Antonio Rubio

Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Monitoring SRAM BTI degradation by current-based tracking technique.

Peyman Pouyan, Esteve Amat, Antonio Rubio

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

2015

Adaptive Proactive Reconfiguration: A Technique for Process-Variability- and Aging-Aware SRAM Cache Design.

Peyman Pouyan, Esteve Amat, Antonio Rubio

IEEE Trans. Very Large Scale Integr. Syst., 2015

Analysis and design of an adaptive proactive reconfiguration approach for memristive crossbar memories.

Peyman Pouyan, Esteve Amat, Antonio Rubio

Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

Memristive crossbar design and test in non-adaptive proactive reconfiguring scheme.

Peyman Pouyan, Esteve Amat, Antonio Rubio

Proceedings of the European Conference on Circuit Theory and Design, 2015

Statistical lifetime analysis of memristive crossbar matrix.

Peyman Pouyan, Esteve Amat, Antonio Rubio

Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015

2014

Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches.

Peyman Pouyan, Esteve Amat, Enrique Barajas, Antonio Rubio

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013

Design and implementation of an adaptive proactive reconfiguration technique for SRAM caches.

Peyman Pouyan, Esteve Amat, Francesc Moll, Antonio Rubio

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Process variability-aware proactive reconfiguration technique for mitigating aging effects in nano scale SRAM lifetime.

Peyman Pouyan, Esteve Amat, Antonio Rubio

Proceedings of the 30th IEEE VLSI Test Symposium, 2012

2011

New reliability mechanisms in memory design for sub-22nm technologies.

Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

A VLSI implementation of logarithmic and exponential functions using a novel parabolic synthesis methodology compared to the CORDIC algorithm.

Peyman Pouyan, Erik Hertz, Peter Nilsson

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011