Francesco Maria Puglisi

Orcid: 0000-0001-6178-2614

According to our database1, Francesco Maria Puglisi authored at least 31 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Hybrid CMOS-Memristor Spiking Neural Network Supporting Multiple Learning Rules.
IEEE Trans. Neural Networks Learn. Syst., April, 2024

2023
Reliability of HfO<sub>2</sub>-Based Ferroelectric FETs: A Critical Review of Current and Future Challenges.
Proc. IEEE, February, 2023

A Unified Framework to Explain Random Telegraph Noise Complexity in MOSFETs and RRAMs.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

The Role of Defects and Interface Degradation on Ferroelectric HZO Capacitors Aging.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022
Effect of cycling on ultra-thin HfZrO<sub>4</sub>, ferroelectric synaptic weights.
Neuromorph. Comput. Eng., 2022

Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing.
CoRR, 2022

The Relevance of Trapped Charge for Leakage and Random Telegraph Noise Phenomena.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Combining Experiments and a Novel Small Signal Model to Investigate the Degradation Mechanisms in Ferroelectric Tunnel Junctions.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Self-consistent Automated Parameter Extraction of RRAM Physics-Based Compact Model.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

Defects Motion as the Key Source of Random Telegraph Noise Instability in Hafnium Oxide.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

2021
Optimized Synthesis Method for Ultra-Low Power Multi-Input Material Implication Logic With Emerging Non-Volatile Memories.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Low-Bit Precision Neural Network Architecture with High Immunity to Variability and Random Telegraph Noise based on Resistive Memories.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020
Reconfigurable Smart In-Memory Computing Platform Supporting Logic and Binarized Neural Networks for Low-Power Edge Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020

Circuit Reliability Analysis of RRAM-based Logic-in-Memory Crossbar Architectures Including Line Parasitic Effects, Variability, and Random Telegraph Noise.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Trap Dynamics Model Explaining the RON Stress/Recovery Behavior in Carbon-Doped Power AlGaN/GaN MOS-HEMTs.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Smart Logic-in-Memory Architecture For Ultra-Low Power Large Fan-In Operations.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019
SIMPLY: Design of a RRAM-Based Smart Logic-in-Memory Architecture using RRAM Compact Model.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Energy-Efficient Logic-in-Memory I-bit Full Adder Enabled by a Physics-Based RRAM Compact Model.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017
Variability and sensitivity to process parameters variations in InGaAs dual-gate ultra-thin body MOSFETs: A scaling perspective.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Measuring and analyzing Random Telegraph Noise in Nanoscale Devices: The case of resistive random access memories.
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017

A new verilog-A compact model of random telegraph noise in oxide-based RRAM for advanced circuit design.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016
Guidelines for a Reliable Analysis of Random Telegraph Noise in Electronic Devices.
IEEE Trans. Instrum. Meas., 2016

Bipolar Resistive RAM Based on HfO<sub>2</sub>: Physics, Compact Modeling, and Variability Control.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Multiscale modeling of electron-ion interactions for engineering novel electronic devices and materials.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Probing defects generation during stress in high-κ/metal gate FinFETs by random telegraph noise characterization.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
A microscopic physical description of RTN current fluctuations in HfOx RRAM.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Characterization of anomalous Random Telegraph Noise in Resistive Random Access Memory.
Proceedings of the 45th European Solid State Device Research Conference, 2015

2014
Analysis of RTN and cycling variability in HfO2 RRAM devices in LRS.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
A compact model of hafnium-oxide-based resistive random access memory.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

Random telegraph noise analysis to investigate the properties of active traps of HfO2-based RRAM in HRS.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
Random Telegraph Signal noise properties of HfOx RRAM in high resistive state.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012


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