Gyu-Hong Kim

According to our database1, Gyu-Hong Kim authored at least 10 papers between 2005 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 14 nm FinFET 128 Mb SRAM With V<sub>MIN</sub> Enhancement Techniques for Low-Power Applications.
IEEE J. Solid State Circuits, 2015

Robust via-programmable ROM design based on 45nm process considering process variation and enhancement Vmin and yield.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
13.2 A 14nm FinFET 128Mb 6T SRAM with VMIN-enhancement techniques for low-power applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Pseudo NMOS based sense amplifier for high speed single-ended SRAM.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2005
A 130-nm 0.9-V 66-MHz 8-Mb (256K × 32) local SONOS embedded flash EEPROM.
IEEE J. Solid State Circuits, 2005


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