Younghwi Yang

According to our database, Younghwi Yang authored at least 16 papers between 2012 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface.

Moosung Kim, Sung-Won Yun, Jungjune Park, Hyun Kook Park, Jungyu Lee, Yeong Seon Kim, Dae-Hoon Na, Sara Choi, Youngsun Song, Jonghoon Lee, Hyun-Jun Yoon, Kangbin Lee, Byunghoon Jeong, Sanglok Kim, Junhong Park, Cheon An Lee, Jaeyun Lee, Ji-Sang Lee, Jin Young Chun, Joonsuc Jang, Younghwi Yang, Seung Hyun Moon, Myung-Hoon Choi, Wontae Kim, Jungsoo Kim, Seok-Min Yoon, Pansuk Kwak, Myunghun Lee, Raehyun Song, Sunghoon Kim, Chiweon Yoon, Dongku Kang, Jin-Yub Lee, Jai Hyuk Song

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2019

Variation-Tolerant WL Driving Scheme for High-Capacity NAND Flash Memory.

Junyoung Ko, Younghwi Yang, Jisu Kim, Cheon An Lee, Young-Sun Min, Jin-Young Chun, Moosung Kim, Seong-Ook Jung

IEEE Trans. Very Large Scale Integr. Syst., 2019

2017

Power-Gated 9T SRAM Cell for Low-Energy Operation.

Tae Woo Oh, Hanwool Jeong, Kyoman Kang, Juhyun Park, Younghwi Yang, Seong-Ook Jung

IEEE Trans. Very Large Scale Integr. Syst., 2017

Incremental Bitline Voltage Sensing Scheme With Half-Adaptive Threshold Reference Scheme in MLC PRAM.

Junyoung Ko, Younghwi Yang, Jisu Kim, Younghoon Oh, Hyun Kook Park, Seong-Ook Jung

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis.

Tae Hoon Choi, Hanwool Jeong, Younghwi Yang, Juhyun Park, Seong-Ook Jung

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2016

Full-Swing Local Bitline SRAM Architecture Based on the 22-nm FinFET Technology for Low-Voltage Operation.

Kyoman Kang, Hanwool Jeong, Younghwi Yang, Juhyun Park, Ki-Ryong Kim, Seong-Ook Jung

IEEE Trans. Very Large Scale Integr. Syst., 2016

Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology.

Younghwi Yang, Hanwool Jeong, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory.

Junyoung Ko, Younghwi Yang, Seong-Ook Jung, Jisu Kim, Cheon An Lee, Young-Sun Min, Jin-Young Chun, Moosung Kim

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.

Younghwi Yang, Juhyun Park, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung

IEEE Trans. Very Large Scale Integr. Syst., 2015

Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory.

Heechai Kang, Jisu Kim, Hanwool Jeong, Younghwi Yang, Seong-Ook Jung

IEEE Trans. Very Large Scale Integr. Syst., 2015

SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.

Younghwi Yang, Juhyun Park, Seung Chul Song, Joseph Wang, Geoffrey Yeap, Seong-Ook Jung

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.

Hanwool Jeong, Taewon Kim, Younghwi Yang, Taejoong Song, Gyu-Hong Kim, Hyo-Sig Won, Seong-Ook Jung

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014

One-Sided Static Noise Margin and Gaussian-Tail-Fitting Method for SRAM.

Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung

IEEE Trans. Very Large Scale Integr. Syst., 2014

2013

Dynamic mixed serial-parallel content addressable memory (DMSP CAM).

Mingu Kang, Jisu Kim, Younghwi Yang, Seong-Ook Jung

Int. J. Circuit Theory Appl., 2013

2012

Impact of fin thickness and height on read stability / write ability in tri-gate FinFET based SRAM.

Junha Lee, Hanwool Jeong, Younghwi Yang, Jisu Kim, Seong-Ook Jung

Proceedings of the International SoC Design Conference, 2012

Static read stability and write ability metrics in FinFET based SRAM considering read and write-assist circuits.

Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012