Hiroyuki Iwata

According to our database, Hiroyuki Iwata authored at least 15 papers between 2005 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Test Point Insertion for Multi-Cycle Power-On Self-Test.

Senling Wang, Xihong Zhou, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

ACM Trans. Design Autom. Electr. Syst., 2023

A New Framework for RTL Test Points Insertion Facilitating a "Shift-Left DFT" Strategy.

Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima, Oussama Laouamri, Naveen Khanna, Jeff Mayer, Nilanjan Mukherjee

Proceedings of the IEEE International Test Conference, 2023

2021

A Power Reduction Method for Scan Testing in Ultra-Low Power Designs.

Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

Proceedings of the 30th IEEE Asian Test Symposium, 2021

2020

FF-Control Point Insertion (FF-CPI) to Overcome the Degradation of Fault Detection under Multi-Cycle Test for POST.

Hanan T. Al-Awadhi, Tomoki Aono, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

IEICE Trans. Inf. Syst., 2020

2018

Automotive Functional Safety Assurance by POST with Sequential Observation.

Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Jun Matsushima

IEEE Des. Test, 2018

Fault-detection-strengthened method to enable the POST for very-large automotive MCU in compliance with ISO26262.

Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

Proceedings of the 23rd IEEE European Test Symposium, 2018

Capture-Pattern-Control to Address the Fault Detection Degradation Problem of Multi-cycle Test in Logic BIST.

Senling Wang, Tomoki Aono, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017

A multichannel-near-infrared-spectroscopy-triggered robotic hand rehabilitation system for stroke patients.

Jongseung Lee, Nobutaka Mukae, Jumpei Arata, Hiroyuki Iwata, Keiji Iramina, Koji Iihara, Makoto Hashizume

Proceedings of the International Conference on Rehabilitation Robotics, 2017

2016

Structure-Based Methods for Selecting Fault-Detection-Strengthened FF under Multi-cycle Test with Sequential Observation.

Senling Wang, Hanan T. Al-Awadhi, Soh Hamada, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Jun Matsushima

Proceedings of the 25th IEEE Asian Test Symposium, 2016

Multi-configuration Scan Structure for Various Purposes.

Hiroyuki Iwata, Jun Matsushima

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2012

An Effective At-Speed Scan Testing Approach Using Multiple-Timing Clock Waveforms.

Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima, Masahiro Takakura

Proceedings of the 21st IEEE Asian Test Symposium, 2012

2011

Low Power Decompressor and PRPG with Constant Value Broadcast.

Michal Filipek, Yoshiaki Fukui, Hiroyuki Iwata, Grzegorz Mrugalski, Janusz Rajski, Masahiro Takakura, Jerzy Tyszer

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2008

A Nonscan Design-for-Testability Method for Register-Transfer-Level Circuits to Guarantee Linear-Depth Time Expansion Models.

Hideo Fujiwara, Hiroyuki Iwata, Tomokazu Yoneda, Chia Yee Ooi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007

A DFT Method for Time Expansion Model at Register Transfer Level.

Hiroyuki Iwata, Tomokazu Yoneda, Hideo Fujiwara

Proceedings of the 44th Design Automation Conference, 2007

2005

A DFT Method for RTL Data Paths Based on Partially Strong Testability to Guarantee Complete Fault Efficiency.

Hiroyuki Iwata, Tomokazu Yoneda, Satoshi Ohtake, Hideo Fujiwara

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005