Huilong Zhu

According to our database1, Huilong Zhu authored at least 14 papers between 2015 and 2023.

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Bibliography

2023
On the SRAM with comb-shaped nano FETs advancing to 3 nm node and beyond.
Microelectron. J., 2023

2022
Data Augmentation Algorithm Based on Local Dynamic Transformation.
Proceedings of the International Conference on Artificial Intelligence, 2022

2021
Investigation on negative capacitance FinEFT beyond 7 nm node from device to circuit.
Microelectron. J., 2021

Investigation of negative DIBL effect for ferroelectric-based FETs to improve MOSFETs and CMOS circuits.
Microelectron. J., 2021

2020
Substrate effect on radiation-induced charge trapping in buried oxide for partially-depleted SOI NMOSFET.
IEICE Electron. Express, 2020

The Investigation of Negative Capacitance Vertical Nanowire FETs Based on SPICE Model at Device-Circuit Level.
CoRR, 2020

Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO<sub>2</sub>/TiN-capping/TiAl gate stacks.
Sci. China Inf. Sci., 2020

2019
Radiation-enhanced channel length modulation induced by trapped charges in buried oxide layer.
IEICE Electron. Express, 2019

2018
A novel highly reliable and low-power radiation hardened SRAM bit-cell design.
IEICE Electron. Express, 2018

A novel self-recoverable and triple nodes upset resilience DICE latch.
IEICE Electron. Express, 2018

A novel SEU tolerant memory cell for space applications.
IEICE Electron. Express, 2018

2017
Charge pumping test technique using CMOS ring oscillator on leakage issue.
Microelectron. J., 2017

2016
Accurate lifetime prediction for channel hot carrier stress on sub-1 nm equivalent oxide thickness HK/MG nMOSFET with thin titanium nitride capping layer.
Microelectron. Reliab., 2016

2015
Overshoot stress impact on HfO2 high-κ layer dynamic SILC.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015


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