Il Park

Affiliations:
  • K hynix Inc., Icheon, South Korea
  • Purdue University, School of Electrical and Computer Engineering, West Lafayette, IN, USA (former)


According to our database1, Il Park authored at least 15 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application.
IEEE J. Solid State Circuits, 2023

2022
Low-overhead inverted LUT design for bounded DNN activation functions on floating-point vector ALUs.
Microprocess. Microsystems, September, 2022

Silent-PIM: Realizing the Processing-in-Memory Computing With Standard Memory Requests.
IEEE Trans. Parallel Distributed Syst., 2022

A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep-Learning Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Holistic approaches to memory solutions for the Autonomous Driving Era.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022


2020
Newton: A DRAM-maker's Accelerator-in-Memory (AiM) Architecture for Machine Learning.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

2019
Design of Processing-"Inside"-Memory Optimized for DRAM Behaviors.
IEEE Access, 2019


2017
Content-Aware Bit Shuffling for Maximizing PCM Endurance.
ACM Trans. Design Autom. Electr. Syst., 2017

2006
Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?.
Proceedings of the Architecture of Computing Systems, 2006

2003
Reducing Design Complexity of the Load/Store Queue.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

Iimplicitly-Multithreaded Processors.
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

2002
Reducing register ports for higher speed and lower energy.
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

2001
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor.
Proceedings of the 15th international conference on Supercomputing, 2001


  Loading...