Innocent Agbo

Orcid: 0000-0001-5901-4915

According to our database1, Innocent Agbo authored at least 19 papers between 2013 and 2020.

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Bibliography

2020
Big Data Architecture: Designing the Right Solution for Social Network Analysis.
Proceedings of the 8th International Symposium on Digital Forensics and Security, 2020

2019
Parametric and Functional Degradation Analysis of Complete 14-nm FinFET SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Software-Based Mitigation for Memory Address Decoder Aging.
Proceedings of the IEEE Latin American Test Symposium, 2019

Reliability Modeling and Mitigation for Embedded Memories.
Proceedings of the IEEE International Test Conference, 2019

Hardware-Based Aging Mitigation Scheme for Memory Address Decoder.
Proceedings of the 24th IEEE European Test Symposium, 2019

Methodology for Application-Dependent Degradation Analysis of Memory Timing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Impact and mitigation of SRAM read path aging.
Microelectron. Reliab., 2018

Degradation analysis of high performance 14nm FinFET SRAM.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Mitigation of sense amplifier degradation using input switching.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Read path degradation analysis in SRAM.
Proceedings of the 21th IEEE European Test Symposium, 2016

Comparative BTI analysis for various sense amplifier designs.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015
Integral impact of BTI and voltage temperature variation on SRAM sense amplifier.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

BTI analysis of SRAM write driver.
Proceedings of the 10th International Design & Test Symposium, 2015

Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier.
Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015

2014
Bias Temperature Instability analysis of FinFET based SRAM cells.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
BTI impact on SRAM sense amplifier.
Proceedings of the 8th International Design and Test Symposium, 2013


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