Jinho Lee

Orcid: 0000-0003-4010-6611

Affiliations:
  • Seoul National University, Department of Electrical and Computer Engineering, Seoul, South Korea
  • Yonsei University, Department of Computer Science, Seoul, South Korea
  • IBM Research, Austin, TX, USA


According to our database1, Jinho Lee authored at least 75 papers between 2011 and 2025.

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Bibliography

2025
INF<sup>2</sup>: High-Throughput Generative Inference of Large Language Models using Near-Storage Processing.
CoRR, February, 2025

PathWeaver: A High-Throughput Multi-GPU System for Graph-Based Approximate Nearest Neighbor Search.
Proceedings of the 2025 USENIX Annual Technical Conference, 2025

G^3SA: A GPU-Accelerated Gold Standard Genomics Library for End-to-End Sequence Alignment.
Proceedings of the 39th ACM International Conference on Supercomputing, 2025

Piccolo: Large-Scale Graph Processing with Fine-Grained in-Memory Scatter-Gather.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025

MimiQ: Low-Bit Data-Free Quantization of Vision Transformers with Encouraging Inter-Head Attention Similarity.
Proceedings of the AAAI-25, Sponsored by the Association for the Advancement of Artificial Intelligence, February 25, 2025

2024
AIS-SNU/GraNNDis_Artifact: Artifact Evaluation Submission.
Dataset, July, 2024

MimiQ: Low-Bit Data-Free Quantization of Vision Transformers with Encouraging Inter-Head Attention Similarity.
CoRR, 2024

A Case for In-Memory Random Scatter-Gather for Fast Graph Processing.
IEEE Comput. Archit. Lett., 2024

AGAThA: Fast and Efficient GPU Acceleration of Guided Sequence Alignment for Long Read Mapping.
Proceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, 2024

PID-Comm: A Fast and Flexible Collective Communication Framework for Commodity Processing-in-DIMM Devices.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

DataFreeShield: Defending Adversarial Attacks without Training Data.
Proceedings of the Forty-first International Conference on Machine Learning, 2024

Smart-Infinity: Fast Large Language Model Training using Near-Storage Processing on a Real System.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

Pipette: Automatic Fine-Grained Large Language Model Training Configurator for Real-World Clusters.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

PeerAiD: Improving Adversarial Distillation from a Specialized Peer Tutor.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024

GraNNDis: Fast Distributed Graph Neural Network Training Framework for Multi-Server Clusters.
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024

2023
Enabling Fine-Grained Spatial Multitasking on Systolic-Array NPUs Using Dataflow Mirroring.
IEEE Trans. Computers, December, 2023

Design and Analysis of a Processing-in-DIMM Join Algorithm: A Case Study with UPMEM DIMMs.
Proc. ACM Manag. Data, 2023

GraNNDis: Efficient Unified Distributed Training Framework for Deep GNNs on Large Clusters.
CoRR, 2023

SGCN: Exploiting Compressed-Sparse Features in Deep Graph Convolutional Network Accelerators.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

Pipe-BD: Pipelined Parallel Blockwise Distillation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Fast Adversarial Training with Dynamic Batch-level Attack Control.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Optimus-CC: Efficient Large NLP Model Training with 3D Parallelism Aware Communication Compression.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
ComPreEND: Computation Pruning through Predictive Early Negative Detection for ReLU in a Deep Neural Network Accelerator.
IEEE Trans. Computers, 2022

GuardiaNN: Fast and Secure On-Device Inference in TrustZone Using Embedded SRAM and Cryptographic Hardware.
Proceedings of the Middleware '22: 23rd International Middleware Conference, Quebec, QC, Canada, November 7, 2022

GCoM: a detailed GPU core model for accurate analytical modeling of modern GPUs.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

SALoBa: Maximizing Data Locality and Workload Balance for Fast Sequence Alignment on GPUs.
Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

Enabling hard constraints in differentiable neural network and accelerator co-exploration.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

It's All In the Teacher: Zero-Shot Quantization Brought Closer to the Teacher.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022

Improving Gradient Paths for Binary Convolutional Neural Networks.
Proceedings of the 33rd British Machine Vision Conference 2022, 2022

Slice-and-Forge: Making Better Use of Caches for Graph Convolutional Network Accelerators.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

Decoupling Schedule, Topology Layout, and Algorithm to Easily Enlarge the Tuning Space of GPU Graph Processing.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021
Making a Better Use of Caches for GCN Accelerators with Feature Slicing and Automatic Tile Morphing.
IEEE Comput. Archit. Lett., 2021

Qimera: Data-free Quantization with Synthetic Boundary Supporting Samples.
Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021

AutoReCon: Neural Architecture Search-based Reconstruction for Data-free Compression.
Proceedings of the Thirtieth International Joint Conference on Artificial Intelligence, 2021

An Attention Module for Convolutional Neural Networks.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2021, 2021

GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Dataflow Mirroring: Architectural Support for Highly Efficient Fine-Grained Spatial Multitasking on Systolic-Array NPUs.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

DANCE: Differentiable Accelerator/Network Co-Exploration.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
An Efficient High-Throughput LZ77-Based Decompressor in Reconfigurable Logic.
J. Signal Process. Syst., 2020

In-memory database acceleration on FPGAs: a survey.
VLDB J., 2020

Deep Composer Classification Using Symbolic Representation.
CoRR, 2020

SoFAr: Shortcut-based Fractal Architectures for Binary Convolutional Neural Networks.
CoRR, 2020

SimEx: Express Prediction of Inter-dataset Similarity by a Fleet of Autoencoders.
CoRR, 2020

FlexReduce: Flexible All-reduce for Distributed Deep Learning on Asymmetric Network Topology.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

MUTE: Inter-class Ambiguity Driven Multi-hot Target Encoding for Deep Neural Network Design.
Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

2019
Accelerating Conversational Agents Built With Off-the-Shelf Modularized Services.
IEEE Pervasive Comput., 2019

A Diagnosable Network-on-Chip for FPGA Verification of Intellectual Properties.
IEEE Des. Test, 2019

MUTE: Data-Similarity Driven Multi-hot Target Encoding for Neural Network Design.
CoRR, 2019

An Efficient Graph Compressor Based on Adaptive Prefix Encoding.
Proceedings of the 31st International Conference on Scientific and Statistical Database Management, 2019

Towards Peripheral Awareness of Remote Family Member's Context Using Self-mobile Robotic Avatars.
Proceedings of the 17th Annual International Conference on Mobile Systems, 2019

Video-Text Compliance: Activity Verification Based on Natural Language Instructions.
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019

A Fine-Grained Parallel Snappy Decompressor for FPGAs Using a Relaxed Execution Model.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Refine and Recycle: A Method to Increase Decompression Parallelism.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
TEI-NoC: Optimizing Ultralow Power NoCs Exploiting the Temperature Effect Inversion.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Deep neural networks with weighted spikes.
Neurocomputing, 2018

System G Distributed Graph Database.
CoRR, 2018

HomeMeld: Co-present Robotic Avatar System for Illusion of Living Together.
Proceedings of the 16th Annual International Conference on Mobile Systems, 2018

My Being to Your Place, Your Being to My Place: Co-present Robotic Avatars Create Illusion of Living Together.
Proceedings of the 16th Annual International Conference on Mobile Systems, 2018

2017
Excavating the Hidden Parallelism Inside DRAM Architectures With Buffered Compares.
IEEE Trans. Very Large Scale Integr. Syst., 2017

ExtraV: Boosting Graph Processing Near Storage with a Coherent Accelerator.
Proc. VLDB Endow., 2017

Analyzing In-Memory Hash Join: Granularity Matters.
Proceedings of the International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures, 2017

SCI-FII: Speculative Conversational Interface Framework for Incremental Inference on Modularized Services.
Proceedings of the 18th IEEE International Conference on Mobile Data Management, 2017

Scalable time-versioning support for property graph databases.
Proceedings of the 2017 IEEE International Conference on Big Data (IEEE BigData 2017), 2017

2016
Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections.
ACM J. Emerg. Technol. Comput. Syst., 2015

THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Tree-Mesh Heterogeneous Topology for Low-Latency NoC.
Proceedings of the 2014 International Workshop on Network on Chip Architectures, 2014

2013
Deflection routing in 3D network-on-chip with limited vertical bandwidth.
ACM Trans. Design Autom. Electr. Syst., 2013

Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

A deadlock-free routing algorithm requiring no virtual channel on 3D-NoCs with partial vertical connections.
Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013

Towards optimal adaptive routing in 3D NoC with limited vertical bandwidth.
Proceedings of the Network on Chip Architectures, 2013

Deflection routing in 3D Network-on-Chip with TSV serialization.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
An adaptive routing algorithm for 3D mesh NoC with limited vertical bandwidth.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Memory-aware mapping and scheduling of tasks and communications on many-core SoC.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
3D network-on-chip with wireless links through inductive coupling.
Proceedings of the International SoC Design Conference, 2011


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