Frank Liu

Orcid: 0000-0001-6615-0739

Affiliations:
  • Oak Ridge National Laboratory, Computer Science and Mathematics Division, TN, USA
  • IBM Austin Research Laboratory, Austin, TX, USA (former)
  • Carnegie Mellon University, Pittsburgh, PA, USA (PhD)


According to our database1, Frank Liu authored at least 100 papers between 2002 and 2024.

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Bibliography

2024
Artificial Intelligence for the Electron Ion Collider (AI4EIC).
Comput. Softw. Big Sci., December, 2024

Semi-supervised Learning of Dynamical Systems with Neural Ordinary Differential Equations: A Teacher-Student Model Approach.
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024

2023
Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials.
Int. J. High Perform. Comput. Appl., July, 2023

Adversarial Estimation of Topological Dimension with Harmonic Score Maps.
CoRR, 2023

Extreme Risk Mitigation in Reinforcement Learning using Extreme Value Theory.
CoRR, 2023

Artificial Intelligence for the Electron Ion Collider (AI4EIC).
CoRR, 2023

Mixed-Precision S/DGEMM Using the TF32 and TF64 Frameworks on Low-Precision AI Tensor Cores.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

DDStore: Distributed Data Store for Scalable Training of Graph Neural Networks on Large Atomistic Modeling Datasets.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Tiling Framework for Heterogeneous Computing of Matrix based Tiled Algorithms.
Proceedings of the 2nd International Workshop on Extreme Heterogeneity Solutions, 2023

A 3D Implementation of Convolutional Neural Network for Fast Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Accelerating Scientific Simulations with Bi-Fidelity Weighted Transfer Learning.
Proceedings of the International Conference on Machine Learning and Applications, 2023

Disentangling Learning Representations with Density Estimation.
Proceedings of the Eleventh International Conference on Learning Representations, 2023

IRIS-DMEM: Efficient Memory Management for Heterogeneous Computing.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023

Errant Beam Detection Using the AMD Versal ACAP and Vitis AI.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023

FPGA Acceleration of GCN in Light of the Symmetry of Graph Adjacency Matrix.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

AutoNF: Automated Architecture Optimization of Normalizing Flows with Unconstrained Continuous Relaxation Admitting Optimal Discrete Solution.
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

2022
Efficient continual learning at the edge with progressive segmented training.
Neuromorph. Comput. Eng., December, 2022

Adrastea: An Efficient FPGA Design Environment for Heterogeneous Scientific Computing and Machine Learning.
Proceedings of the Accelerating Science and Engineering Discoveries Through Integrated Research Infrastructure for Experiment, Big Data, Modeling and Simulation, 2022

LaRIS: Targeting Portability and Productivity for LAPACK Codes on Extreme Heterogeneous Systems by Using IRIS.
Proceedings of the IEEE/ACM Redefining Scalability for Diversely Heterogeneous Architectures Workshop, 2022

Evaluating HPC Kernels for Processing in Memory.
Proceedings of the 2022 International Symposium on Memory Systems, 2022

IRIS-BLAS: Towards a Performance Portable and Heterogeneous BLAS Library.
Proceedings of the 29th IEEE International Conference on High Performance Computing, 2022

Ultra Low Latency Machine Learning for Scientific Edge Applications.
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

NashAE: Disentangling Representations Through Adversarial Covariance Minimization.
Proceedings of the Computer Vision - ECCV 2022, 2022

Gradient-Based Novelty Detection Boosted by Self-Supervised Binary Classification.
Proceedings of the Thirty-Sixth AAAI Conference on Artificial Intelligence, 2022

2021
Self-supervised Novelty Detection for Continual Learning: A Gradient-Based Approach Boosted by Binary Classification.
Proceedings of the Continual Semi-Supervised Learning - First International Workshop, 2021

A Hierarchical Task Scheduler for Heterogeneous Computing.
Proceedings of the High Performance Computing - 36th International Conference, 2021

On the Stochastic Stability of Deep Markov Models.
Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021

A Memory Efficient Lock-Free Circular Queue.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Evolutionary NAS in Light of Model Stability for Accurate Continual Learning.
Proceedings of the International Joint Conference on Neural Networks, 2021

2020
SimEx: Express Prediction of Inter-dataset Similarity by a Fleet of Autoencoders.
CoRR, 2020

Online Knowledge Acquisition with the Selective Inherited Model.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020

Noise-based Selection of Robust Inherited Model for Accurate Continual Learning.
Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

Deffe: a data-efficient framework for performance characterization in domain-specific computing.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

Scaled Population Arithmetic for Efficient Stochastic Computing.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Single-Net Continual Learning with Progressive Segmented Training (PST).
CoRR, 2019

An Efficient Graph Compressor Based on Adaptive Prefix Encoding.
Proceedings of the 31st International Conference on Scientific and Statistical Database Management, 2019

Single-Net Continual Learning with Progressive Segmented Training.
Proceedings of the 18th IEEE International Conference On Machine Learning And Applications, 2019

Video-Text Compliance: Activity Verification Based on Natural Language Instructions.
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019

A Memory-Efficient Markov Decision Process Computation Framework Using BDD-based Sampling Representation.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Optimization of Genomics Analysis Pipeline for Scalable Performance in a Cloud Environment.
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2018

2017
Highlights of ICCAD 2016.
IEEE Des. Test, 2017

Fast and Highly Scalable Bayesian MDP on a GPU Platform.
Proceedings of the 8th ACM International Conference on Bioinformatics, 2017

SparkGA: A Spark Framework for Cost Effective, Fast and Accurate DNA Analysis at Scale.
Proceedings of the 8th ACM International Conference on Bioinformatics, 2017

2016
From the Heart of Silicon Valley to the Hill Country - Highlights of ICCAD 2015.
IEEE Des. Test, 2016

GPU acceleration for Bayesian control of Markovian genetic regulatory networks.
Proceedings of the 2016 IEEE-EMBS International Conference on Biomedical and Health Informatics, 2016

2015
Efficient Transient Analysis of Power Delivery Network With Clock/Power Gating by Sparse Approximation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

STAC-A2™ benchmark on POWER8.
Proceedings of the 8th Workshop on High Performance Computational Finance, 2015

2014
Rivers and Electric Networks: Crossing Disciplines in Modeling and Simulation.
Found. Trends Electron. Des. Autom., 2014

Applying microprocessor analysis methods to river network modelling.
Environ. Model. Softw., 2014

IFM: A Scalable High Resolution Flood Modeling Framework.
Proceedings of the Euro-Par 2014 Parallel Processing, 2014

A Time-Unrolling Method to Compute Sensitivity of Dynamic Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2012
Spatial variation decomposition via sparse regression.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2012 TAU power grid simulation contest: Benchmark suite and results.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Dynamic river network simulation at large scale.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Statistical Modeling and Simulation of Threshold Variation Under Random Dopant Fluctuations and Line-Edge Roughness.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Pure nodal analysis for efficient on-chip interconnect model order reduction.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2011 TAU power grid simulation contest: Benchmark suite and results.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

An efficient mask optimization method based on homotopy continuation technique.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Modeling and Analysis of the Nonrectangular Gate Effect for Postlithography Circuit Simulation.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Guest Editors' Introduction: Compact Variability Modeling in Scaled CMOS Design.
IEEE Des. Test Comput., 2010

Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Physical design techniques for optimizing RTA-induced variations.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Finite-Point-Based Transistor Model: A New Approach to Fast Circuit Simulation.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Modeling of layout-dependent stress effect in CMOS design.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

Variability analysis under layout pattern-dependent rapid-thermal annealing process.
Proceedings of the 46th Design Automation Conference, 2009

Predicting variability in nanoscale lithography processes.
Proceedings of the 46th Design Automation Conference, 2009

2008
Metrics Used in Physical Design.
Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

MAISE: An Interconnect Simulation Engine for Timing and Noise Analysis.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

A Root-Finding Method for Assessing SRAM Stability.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness.
Proceedings of the 45th Design Automation Conference, 2008

2007
Fast Variational Interconnect Delay and Slew Computation Using Quadratic Models.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Integrated Placement and Skew Optimization for Rotary Clocking.
IEEE Trans. Very Large Scale Integr. Syst., 2007

An efficient method for statistical circuit simulation.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Efficient computation of current flow in signal wires for reliability analysis.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Rigorous extraction of process variations for 65nm CMOS design.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

Fast statistical circuit analysis with finite-point based transistor model.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

The Impact of NBTI on the Performance of Combinational and Sequential Circuits.
Proceedings of the 44th Design Automation Conference, 2007

Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation.
Proceedings of the 44th Design Automation Conference, 2007

A General Framework for Spatial Correlation Modeling in VLSI Design.
Proceedings of the 44th Design Automation Conference, 2007

A New Methodology for Interconnect Parasitics Extraction Considering Photo-Lithography Effects.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Accurate Thermal Analysis Considering Nonlinear Thermal Conductivity.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Practical variation-aware interconnect delay and slew analysis for statistical timing verification.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Integrated placement and skew optimization for rotary clocking.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

A practical method to estimate interconnect responses to variabilities.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Circuit Optimization Using Scale Based Sensitivities.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction.
Proceedings of the 2005 Design, 2005

A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis.
Proceedings of the 42nd Design Automation Conference, 2005

2004
A delay metric for RC circuits based on the Weibull distribution.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Closed-form expressions for extending step delay and slew metrics to ramp inputs for RC trees.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Closed-form delay and slew metrics made easy.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Variational delay metrics for interconnect timing analysis.
Proceedings of the 41th Design Automation Conference, 2004

2003
Closed form expressions for extending step delay and slew metrics to ramp inputs.
Proceedings of the 2003 International Symposium on Physical Design, 2003

Full chip leakage estimation considering power supply and temperature variations.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Delay and slew metrics using the lognormal distribution.
Proceedings of the 40th Design Automation Conference, 2003

2002
PERI: a technique for extending delay and slew metrics to ramp inputs.
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002

Test structures for delay variability.
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002


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