According to our database1, Junjun Li authored at least 16 papers between 2006 and 2019.
Legend:Book In proceedings Article PhD thesis Other
Three-phase qubits-based quantum Ant Colony Optimization Algorithm for Path Planning of Automated Guided Vehicles.
I. J. Robotics and Automation, 2019
Robust modeling and planning of radio-frequency identification network in logistics under uncertainties.
An Indoor Navigation Control Strategy for a Brain-Actuated Mobile Robot.
Proceedings of the 3rd International Conference on Advanced Robotics and Mechatronics, 2018
Research on the allocation decision of emergency material productivity reserve under the cooperation between the government and the enterprise.
Proceedings of the International Conference on Logistics, Informatics and Service Sciences, 2016
An ant colony algorithm-based fast configuration design method for large container cranes.
EA-COR: An Environment Adaptive Clustering Opportunistic Routing Protocol of WSN.
Bundle recommendation in ecommerce.
Proceedings of the 37th International ACM SIGIR Conference on Research and Development in Information Retrieval, 2014
ARX modelling and model predictive control for solid oxide fuel cell.
Research and Application of gas reservoir modeling.
Proceedings of the Eighth International Conference on Fuzzy Systems and Knowledge Discovery, 2011
Simulation of ESD protection devices in an advanced CMOS technology using a TCAD workbench based on an ESD calibration methodology.
Microelectronics Reliability, 2010
Fully depleted extremely thin SOI for mainstream 20nm low-power technology and beyond.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
A Blending E-Learning Model for Digital Electronic Technology Teaching.
Proceedings of the International Conference on E-Business and E-Government, 2010
Design optimization of gate-silicided ESD NMOSFETs in a 45 nm bulk CMOS technology.
Microelectronics Reliability, 2009
On Performance of Cooperative Large CDMA Random Access Networks.
Proceedings of the Global Communications Conference, 2007
Compact modeling of on-chip ESD protection devices using Verilog-A.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006
Analysis of ESD failure mechanism in 65nm bulk CMOS ESD NMOSFETs with ESD implant.
Microelectronics Reliability, 2006