Kaya Can Akyel

According to our database1, Kaya Can Akyel authored at least 6 papers between 2013 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2017
High-Density 4T SRAM Bitcell in 14-nm 3-D CoolCube Technology Exploiting Assist Techniques.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2016
DRC<sup>2</sup>: Dynamically Reconfigurable Computing Circuit based on memory architecture.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

2014
Scalable 0.35 V to 1.2 V SRAM Bitcell Design From 65 nm CMOS to 28 nm FDSOI.
IEEE J. Solid State Circuits, 2014

Impact of Random Telegraph Signals on 6T high-density SRAM in 28nm UTBB FD-SOI.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Multiple-pulse dynamic stability and failure analysis of low-voltage 6T-SRAM bitcells in 28nm UTBB-FDSOI.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Scalable 0.35V to 1.2V SRAM bitcell design from 65nm CMOS to 28nm FDSOI.
Proceedings of the ESSCIRC 2013, 2013


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