Sébastien Thuries
According to our database1,
Sébastien Thuries
authored at least 27 papers
between 2012 and 2022.
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Bibliography
2022
Introduction to the Special Issue on Monolithic 3D: Technology, Design and Computing Systems Applications Perspectives.
ACM J. Emerg. Technol. Comput. Syst., 2022
2021
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.
IEEE J. Solid State Circuits, 2021
2020
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm<sup>2</sup> Inter-Chiplet Interconnects and 156mW/mm<sup>2</sup>@ 82%-Peak-Efficiency DC-DC Converters.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning.
Proceedings of the 24th IEEE European Test Symposium, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Merging PDKs to Build a Design Environment for 3D Circuits: Methodology, Challenges and Limitations.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
2018
Some Local Stability Properties of an Autonomous Long Short-Term Memory Neural Network Model.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018
Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
2017
Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits.
Microelectron. J., 2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
7.5 A TCXO-less 100Hz-minimum-bandwidth transceiver for ultra-narrow-band sub-GHz IoT cellular networks.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
DRC<sup>2</sup>: Dynamically Reconfigurable Computing Circuit based on memory architecture.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016
Proceedings of the International Conference on IC Design and Technology, 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016
From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose.
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016
Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016
2015
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2012
Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012