Leyla Nazhandali

J. Hardw. Syst. Secur., 2020

Impact of System-on-Chip Integration of AEAD Ciphers.

[BibT_eX]

[DOI]

Shashank Raghuraman

IACR Cryptol. ePrint Arch., 2020

Skip the clicker: A narrative inquiry of a professor's 'Teaching Toolbox' for large class sizes.

[BibT_eX]

[DOI]

Proceedings of the IEEE Frontiers in Education Conference, 2020

2019

A Secure Exception Mode for Fault-Attack-Resistant Processing.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2019

2018

Inducing local timing fault through EM injection.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Analyzing the Fault Injection Sensitivity of Secure Embedded Software.

[BibT_eX]

[DOI]

Bilgiday Yuce

Nahid Farhady Ghalaty

ACM Trans. Embed. Comput. Syst., 2017

Employing dual-complementary flip-flops to detect EMFI attacks.

[BibT_eX]

[DOI]

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016

A Configurable and Lightweight Timing Monitor for Fault Attack Detection.

[BibT_eX]

[DOI]

Chinmay Deshpande

Bilgiday Yuce

Nahid Farhady Ghalaty

Patrick Schaumont

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

FAME: Fault-attack Aware Microprocessor Extensions for Hardware Fault Detection and Software Fault Response.

[BibT_eX]

[DOI]

Bilgiday Yuce

Nahid Farhady Ghalaty

Proceedings of the Hardware and Architectural Support for Security and Privacy 2016, 2016

2015

Design of Ultra-Low Power Scalable-Throughput Many-Core DSP Applications.

[BibT_eX]

[DOI]

Mohammed Ehteshamuddin

Kyle Stegner

ACM Trans. Design Autom. Electr. Syst., 2015

Study of the impact of aging on many-core energy-efficient DSP systems.

[BibT_eX]

[DOI]

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2014

Sense Amplifier Pass Transistor Logic for energy efficient and DPA-resistant AES circuit.

[BibT_eX]

[DOI]

Mehrdad Khatir

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Circuit-level approach to improve the temperature reliability of Bi-stable PUFs.

[BibT_eX]

[DOI]

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Study of IC aging on ring oscillator physical unclonable functions.

[BibT_eX]

[DOI]

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013

Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits.

[BibT_eX]

[DOI]

Lalleh Rafeei

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

NEMS-Based Functional Unit Power-Gating: Design, Analysis, and Optimization.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Design and benchmarking of an ASIC with five SHA-3 finalist candidates.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2013

Easy-to-build Arbiter Physical Unclonable Function with enhanced challenge/response set.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Quality Electronic Design, 2013

Study of ASIC technology impact factors on performance evaluation of SHA-3 candidates.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

A novel statistical and circuit-based technique for counterfeit detection in existing ICs.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Interlocking obfuscation for anti-tamper hardware.

[BibT_eX]

[DOI]

Proceedings of the Cyber Security and Information Intelligence, 2013

2012

Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2012

From Transistors to NEMS: Highly Efficient Power-Gating of CMOS Circuits.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2012

Design of low-power, scalable-throughput systems at near/sub threshold voltage.

[BibT_eX]

[DOI]

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

Design and analysis of multi-core homogeneous systems for energy harvesting applications.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

ASIC implementations of five SHA-3 finalists.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Design techniques for functional-unit power gating in the Ultra-Low-Voltage region.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture.

[BibT_eX]

[DOI]

Trans. High Perform. Embed. Archit. Compil., 2011

Feedback Based Supply Voltage Control for Temperature Variation Tolerant PUFs.

[BibT_eX]

[DOI]

Vignesh Vivekraja

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

MEMS-Based Power Gating for Highly Scalable Periodic and Event-Driven Processing.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

A Highly Stable Leakage-Based Silicon Physical Unclonable Functions.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Pre-silicon Characterization of NIST SHA-3 Final Round Candidates.

[BibT_eX]

[DOI]

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

A case for NEMS-based functional-unit power gating of low-power embedded microprocessors.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2010

From Statistics to Circuits: Foundations for Future Physical Unclonable Functions.

[BibT_eX]

[DOI]

Proceedings of the Towards Hardware-Intrinsic Security - Foundations and Practice, 2010

On The Impact of Target Technology in SHA-3 Hardware Benchmark Rankings.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2010

Prototyping Platform for Performance Evaluation of SHA-3 Candidates.

[BibT_eX]

[DOI]

Proceedings of the HOST 2010, 2010

From transistors to MEMS: Throughput-aware power gating in CMOS circuits.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Energy-Efficient Subthreshold Processor Design.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

Fast Simulation Framework for Subthreshold Circuits.

[BibT_eX]

[DOI]

Steven B. Griffin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Circuit Level Techniques for Reliable Physically Uncloneable Functions.

[BibT_eX]

[DOI]

Vignesh Vivekraja

Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009

2008

Exploring Variability and Performance in a Sub-200-mV Processor.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

Utilizing sub-threshold technology for the creation of secure circuits.

[BibT_eX]

[DOI]

Syed Imtiaz Haider

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A low-power parallel design of discrete wavelet transform using subthreshold voltage technology.

[BibT_eX]

[DOI]

Syed Imtiaz Haider

Proceedings of the 2008 International Conference on Compilers, 2008

2007

A hybrid code compression technique using bitmask and prefix encoding with enhanced dictionary selection.

[BibT_eX]

[DOI]

Syed Imtiaz Haider

Proceedings of the 2007 International Conference on Compilers, 2007

2006

Architectural optimization for performance- and energy -constrained sensor processors.

[BibT_eX]

[DOI]

PhD thesis, 2006

2005

Energy Optimization of Subthreshold-Voltage Sensor Network Processors.

[BibT_eX]

[DOI]

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Compilers, 2005

2002

Majority-Based Decomposition of Carry Logic in Binary Adders.

[BibT_eX]