Masato Edahiro

According to our database1, Masato Edahiro authored at least 71 papers between 1984 and 2022.

Collaborative distances:
  • Dijkstra number2 of two.
  • Erdős number3 of three.

Timeline

Legend:

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PhD thesis 
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Bibliography

2022
Single-Shot Intrinsic Calibration for Autonomous Driving Applications.
Sensors, 2022

Mapping Method Usable with Clustered Many-core Platforms for Simulink Model.
J. Inf. Process., 2022

2021
Vision-Based Sensing Systems for Autonomous Driving: Centralized or Decentralized?
J. Robotics Mechatronics, 2021

2020
Fast Euclidean Cluster Extraction Using GPUs.
J. Robotics Mechatronics, 2020

An Open Multi-Sensor Fusion Toolbox for Autonomous Vehicles.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020

Switching Hybrid Method Based on User Similarity and Global Statistics for Collaborative Filtering.
IEEE Access, 2020

Similarity Measure for Product Attribute Estimation.
IEEE Access, 2020

Mapping Method of MATLAB/Simulink Model for Embedded Many-Core Platform.
Proceedings of the 28th Euromicro International Conference on Parallel, 2020

2019
Traffic light recognition using high-definition map features.
Robotics Auton. Syst., 2019

Analysis of Memory System of Tiled Many-Core Processors.
IEEE Access, 2019

Optimization of the Load Balancing Policy for Tiled Many-Core Processors.
IEEE Access, 2019

Model-based Parallelization for Simulink Models on Multicore CPUs and GPUs.
Proceedings of the 2019 International SoC Design Conference, 2019

2018
Model-Based Parallelizer for Embedded Control Systems on Single-ISA Heterogeneous Multicore Processors.
Proceedings of the International SoC Design Conference, 2018

GPU-Accelerated VoltDB: A Case for Indexed Nested Loop Join.
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018

Is the Heap Manager Important to Many Cores?
Proceedings of the 8th International Workshop on Runtime and Operating Systems for Supercomputers, 2018

2017
Relational Joins on GPUs: A Closer Look.
IEEE Trans. Parallel Distributed Syst., 2017

Robust and Accurate Monocular Vision-Based Localization in Outdoor Environments of Real-World Robot Challenge.
J. Robotics Mechatronics, 2017

Localization based on multiple visual-metric maps.
Proceedings of the 2017 IEEE International Conference on Multisensor Fusion and Integration for Intelligent Systems, 2017

2016
Accelerated Deformable Part Models on GPUs.
IEEE Trans. Parallel Distributed Syst., 2016

Monocular Vision-Based Localization Using ORB-SLAM with LIDAR-Aided Mapping in Real-World Robot Challenge.
J. Robotics Mechatronics, 2016

Parallel Design of Feedback Control Systems Utilizing Dead Time for Embedded Multicore Processors.
IEICE Trans. Electron., 2016

A Scalability Analysis of Many Cores and On-Chip Mesh Networks on the TILE-Gx Platform.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Pure Pursuit Revisited: Field Testing of Autonomous Vehicles in Urban Areas.
Proceedings of the 4th IEEE International Conference on Cyber-Physical Systems, 2016

2015
Editor's Message to Special Issue of Embedded Systems Engineering.
J. Inf. Process., 2015

System-level Design Method for Control Systems with Hardware-implemented Interrupt Handler.
J. Inf. Process., 2015

Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip.
IPSJ Trans. Syst. LSI Des. Methodol., 2015

Real-Time Visualization of Moving Objects.
Proceedings of the 2015 IEEE 3rd International Conference on Cyber-Physical Systems, 2015

Hexa Cam: An FPGA-Based Multi-view Camera System.
Proceedings of the 2015 IEEE 3rd International Conference on Cyber-Physical Systems, 2015

2014
Exploring the problem of GPU programming for data-intensive applications: a case study of multiple expectation maximization for motif elicitation.
Proceedings of the Fifth Symposium on Information and Communication Technology, 2014

Power and Performance Characterization and Modeling of GPU-Accelerated Systems.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Simple One-to-One Architecture for Parallel Execution of Embedded Control Systems.
Proceedings of the 2014 IEEE International Conference on Cyber-Physical Systems, 2014

Parallel design of control systems utilizing dead time for embedded multicore processors.
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

Establishing a standard interface between multi-manycore and software tools - SHIM.
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2013
Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs.
Int. J. Reconfigurable Comput., 2013

Power and performance of GPU-accelerated systems: A closer look.
Proceedings of the IEEE International Symposium on Workload Characterization, 2013

Data Transfer Matters for GPU Computing.
Proceedings of the 19th IEEE International Conference on Parallel and Distributed Systems, 2013

GPU implementations of object detection using HOG features and deformable models.
Proceedings of the 1st IEEE International Conference on Cyber-Physical Systems, 2013

2012
Efficient Algorithms for Extracting Pareto-optimal Hardware Configurations in DEPS Framework.
IPSJ Trans. Syst. LSI Des. Methodol., 2012

Comparison of Preemption Schemes for Partially Reconfigurable FPGAs.
IEEE Embed. Syst. Lett., 2012

Fastest multi-scalar multiplication based on optimal double-base chains.
Proceedings of the 2012 World Congress on Internet Security, 2012

Calculating Average Joint Hamming Weight for Minimal Weight Conversion of d Integers.
Proceedings of the WALCOM: Algorithms and Computation - 6th International Workshop, 2012

Toward GPU-accelerated traffic simulation and its real-time challenge.
Proceedings of the REACTION 2012, 2012

Fast Elliptic Curve Cryptography Using Minimal Weight Conversion of d Integers.
Proceedings of the Tenth Australasian Information Security Conference, 2012

2011
Fast Elliptic Curve Cryptography Using Optimal Double-Base Chains.
IACR Cryptol. ePrint Arch., 2011

Rainbow: An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Evaluation of Power Consumption at Execution of Multiple Automatically Parallelized and Power Controlled Media Applications on the RP2 Low-Power Multicore.
Proceedings of the Languages and Compilers for Parallel Computing, 2011

Hardware multitasking in dynamically partially reconfigurable FPGA-based embedded systems.
Proceedings of the International SoC Design Conference, 2011

2010
A robust seamless communication architecture for next-generation mobile terminals on multi-CPU SoCs.
ACM Trans. Embed. Comput. Syst., 2010

Optimal Average Joint Hamming Weight and Minimal Weight Conversion of d Integers.
IACR Cryptol. ePrint Arch., 2010

2009
Dynamic security domain scaling on embedded symmetric multiprocessors.
ACM Trans. Design Autom. Electr. Syst., 2009

Parallelizing fundamental algorithms such as sorting on multi-core processors for EDA acceleration.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Processor virtualization for secure mobile terminals.
ACM Trans. Design Autom. Electr. Syst., 2008

FIDES: An advanced chip multiprocessor platform for secure next generation mobile terminals.
ACM Trans. Embed. Comput. Syst., 2008

Multitasking Parallel Method for High-End Embedded Appliances.
IEEE Micro, 2008

2007
Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Towards scalable and secure execution platform for embedded systems.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
VIRTUS: a new processor virtualization architecture for security-oriented next-generation mobile terminals.
Proceedings of the 43rd Design Automation Conference, 2006

2005
FIDES: an advanced chip multiprocessor platform for secure next generation mobile terminals.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

2000
A Single-Chip Multiprocessor for Smart Terminals.
IEEE Micro, 2000

1998
A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs.
Proceedings of the ASP-DAC '98, 1998

Scan-chain Optimization Algorithms for Multiple Scan-paths.
Proceedings of the ASP-DAC '98, 1998

1996
Equispreading Tree in Manhattan Distance.
Algorithmica, 1996

Clock Buffer Placement Algorithm for Wire-Delay-Dominated Timing Model.
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1994
An Efficient Zero-Skew Routing Algorithm.
Proceedings of the 31st Conference on Design Automation, 1994

1993
DCT/IDCT processor for HDTV developed with dsp silicon compiler.
J. VLSI Signal Process., 1993

A Clustering-Based Optimization Algorithm in Zero-Skew Routings.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992
Chrominance/luminance signal separation and syntheses chips developed with a DSP silicon compiler.
IEEE Trans. Circuits Syst. Video Technol., 1992

1990
A Clock Net Reassignment Algorithm Usign Voronoi Diagram.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

New Placement and Global Routing Algorithms for Standard Cell Layouts.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989
A Bucketing Algorithm for the Orthogonal Segment Intersection Search Problem and Its Practical Efficiency.
Algorithmica, 1989

1984
A New Point-Location Algorithm and Its Practical Efficiency: Comparison with Existing Algorithms.
ACM Trans. Graph., 1984


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