Mauricio de Carvalho

According to our database1, Mauricio de Carvalho authored at least 10 papers between 2010 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
Innovative Techniques for Testing and Diagnosing SoCs.
PhD thesis, 2015

2014
Increasing the Fault Coverage of Processor Devices during the Operational Phase Functional Test.
J. Electron. Test., 2014

2013
Fast Power Evaluation for Effective Generation of Test Programs Maximizing Peak Power Consumption.
J. Low Power Electron., 2013

Increasing fault coverage during functional test in the operational phase.
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012
On-line software-based self-test of the Address Calculation Unit in RISC processors.
Proceedings of the 17th IEEE European Test Symposium, 2012

Peak Power Estimation: A Case Study on CPU Cores.
Proceedings of the 21st IEEE Asian Test Symposium, 2012

2011
A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing.
Proceedings of the 16th European Test Symposium, 2011

Optimized embedded memory diagnosis.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
An Enhanced Strategy for Functional Stress Pattern Generation for System-on-Chip Reliability Characterization.
Proceedings of the 11th International Workshop on Microprocessor Test and Verification, 2010

Cumulative embedded memory failure bitmap display & analysis.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010


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