Miguel Gandara

According to our database, Miguel Gandara authored at least 14 papers between 2017 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

From Systematic to Intelligent: Assessing AI-Empowered Optimization Techniques for Analog Building Block Sizing.

Yijia Hao, Miguel Gandara, Srinjoy Mitra, Maarten Strackx, Sandy Cochran, Francisco V. Fernández, Shaolan Li, Bo Liu

IEEE Access, 2025

An AI-driven EDA Algorithm-Empowered VCO and LDO Co-Design Method.

Yijia Hao, Maarten Strackx, Miguel Gandara, Sandy Cochran, Bo Liu

Proceedings of the 21st International Conference on Synthesis, 2025

7.4 A 112Gb/s DSP-Based PAM-4 Receiver with an LC-Resonator-Based CTLE for >52dB Loss Compensation in 4nm FinFET.

Henry Park, Qaiser Nehal, Miguel Gandara, Atharav Atharav, Joonyeong Lee, Jengfeng Li, Tamer Ali

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

7.1 A 212.5Gb/s DSP-Based PAM-4 Transceiver with 50dB Loss Compensation for Large AI System Interconnects in 4nm FinFET.

Ehung Chen, Henry Park, Mohammed Abdullatif, Miguel Gandara, Ahmed ElShater, Amr Khashaba, Shih-Hao Huang, Tsz-Bin Liu, Atharav Atharav, Joonyeong Lee, Qaiser Nehal, Mohamed Megahed, Yusang Chun, Cheng-En Shieh, Vidhan Jolly, SoonWon Kwon, Hsin-Ta Chien, Ke-Chung Wu, Cheng-En Liu, Peng Yan, Po-Jui Li, Chun-Han Chen, Tzu-Shun Lin, Pei-Chieh Liu, Tamer A. Ali

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024

Design of a Two-Stage Miller-Compensated Operational Amplifier Using an EDA Tool-Centered Approach.

Yijia Hao, Miguel Gandara, Srinjoy Mitra, Sandy Cochran, Bo Liu

Proceedings of the 20th International Conference on Synthesis, 2024

2023

A 4.63pJ/b 112Gb/s DSP-Based PAM-4 Transceiver for a Large-Scale Switch in 5nm FinFET.

Henry Park, Mohammed Abdullatif, Ehung Chen, Ahmed Elmallah, Qaiser Nehal, Miguel Gandara, Tsz-Bin Liu, Amr Khashaba, Joonyeong Lee, Chih-Yi Kuan, Dhinessh Ramachandran, Ruey-Bo Sun, Atharav Atharav, Yusang Chun, Mantian Zhang, Deng-Fu Weng, Chung-Hsien Tsai, Chen-Hao Chang, Chia-Sheng Peng, Sheng-Tsung Hsu, Tamer A. Ali

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022

An Efficient Analog Circuit Sizing Method Based on Machine Learning Assisted Global Optimization.

Ahmet Faruk Budak, Miguel Gandara, Wei Shi, David Z. Pan, Nan Sun, Bo Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS.

Abhishek Mukherjee, Miguel Gandara, Xiangxing Yang, Linxiao Shen, Xiyuan Tang, Chen-Kai Hsu, Nan Sun

IEEE J. Solid State Circuits, 2021

56/112Gbps Wireline Transceivers for Next Generation Data Centers on 7nm FINFET CMOS Technology.

Tamer A. Ali, Mohammed Abdullatif, Henry Park, Ehung Chen, Ramy Awad, Miguel Gandara

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020

6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology.

Tamer A. Ali, Ehung Chen, Henry Park, Ramy Yousry, Yu-Ming Ying, Mohammed Abdullatif, Miguel Gandara, Chun-Cheng Liu, Po-Shuan Weng, Huan-Sheng Chen, Mohammad Elbadry, Qaiser Nehal, Kun-Hung Tsai, Kevin Tan, Yi-Chieh Huang, Chung-Hsien Tsai, Yuyun Chang, Yuan-Hao Tung

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018

A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure.

Shaolan Li, Bo Qiao, Miguel Gandara, David Z. Pan, Nan Sun

IEEE J. Solid State Circuits, 2018

A 13-ENOB 2^nd-order noise-shaping SAR ADC realizing optimized NTF zeros using an error-feedback structure.

Shaolan Li, Bo Qiao, Miguel Gandara, Nan Sun

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

A pipelined SAR ADC reusing the comparator as residue amplifier.

Miguel Gandara, Wenjuan Guo, Xiyuan Tang, Long Chen, Yeonam Yoon, Nan Sun

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A 172dB-FoM pipelined SAR ADC using a regenerative amplifier with self-timed gain control and mixed-signal background calibration.

Miguel Gandara, Paridhi Gulati, Nan Sun

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017