Tatsuya Kamei

According to our database1, Tatsuya Kamei authored at least 11 papers between 2005 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
An Efficient and Accurate Time Step Control Method for Power Device Transient Simulation Utilizing Dominant Time Constant Approximation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2020

2009
A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU.
J. Solid-State Circuits, 2009

A 65nm dual-mode baseband and multimedia application processor SoC with advanced power and memory management.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo Encoding.
J. Solid-State Circuits, 2008

A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Embedded SoC Resource Manager to Control Temperature and Data Bandwidth.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
Development of processor cores for digital consumer appliances.
Systems and Computers in Japan, 2006

SH-X: An embedded processor core for consumer appliances.
J. Embedded Computing, 2006

2005
SH-X: an embedded processor core for consumer appliances.
SIGARCH Computer Architecture News, 2005

A 4500 MIPS/W, 86 µA Resume-Standby, 11 µA Ultra-Standby Application Processor for 3G Cellular Phones.
IEICE Transactions, 2005


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