Nan Jiang

According to our database, Nan Jiang authored at least 17 papers between 2007 and 2021.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2021

Simba: scaling deep-learning inference with chiplet-based architecture.

Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler

Commun. ACM, 2021

Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator.

Oreste Villa, Daniel Lustig, Zi Yan, Evgeny Bolotin, Yaosheng Fu, Niladrish Chatterjee, Nan Jiang, David W. Nellans

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm.

Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany

IEEE J. Solid State Circuits, 2020

An In-Network Architecture for Accelerating Shared-Memory Multiprocessor Collectives.

Benjamin Klenk, Nan Jiang, Greg Thorson, Larry Dennison

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019

A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm.

Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.

Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology.

Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany

Proceedings of the 2019 IEEE Hot Chips 31 Symposium (HCS), 2019

2018

Exploiting idle resources in a high-radix switch for supplemental storage.

Matthias A. Blumrich, Nan Jiang, Larry R. Dennison

Proceedings of the International Conference for High Performance Computing, 2018

2015

Network endpoint congestion control for fine-grained communication.

Nan Jiang, Larry R. Dennison, William J. Dally

Proceedings of the International Conference for High Performance Computing, 2015

2013

Channel reservation protocol for over-subscribed channels and destinations.

George Michelogiannakis, Nan Jiang, Daniel Becker, William J. Dally

Proceedings of the International Conference for High Performance Computing, 2013

A detailed and flexible cycle-accurate Network-on-Chip simulator.

Nan Jiang, Daniel U. Becker, George Michelogiannakis, James D. Balfour, Brian Towles, David E. Shaw, John Kim, William J. Dally

Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

2012

Adaptive Backpressure: Efficient buffer management for on-chip networks.

Daniel U. Becker, Nan Jiang, George Michelogiannakis, William J. Dally

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Network congestion avoidance through Speculative Reservation.

Nan Jiang, Daniel U. Becker, George Michelogiannakis, William J. Dally

Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2011

Packet Chaining: Efficient Single-Cycle Allocation for On-Chip Networks.

George Michelogiannakis, Nan Jiang, Daniel Becker, William J. Dally

IEEE Comput. Archit. Lett., 2011

2009

Indirect adaptive routing on large scale interconnection networks.

Nan Jiang, John Kim, William J. Dally

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

2008

A MIPS R2000 implementation.

Nathaniel Ross Pinckney, Thomas Barr, Michael Dayringer, Matthew McKnett, Nan Jiang, Carl Nygaard, David Money Harris, Joel Stanley, Braden Phillips

Proceedings of the 45th Design Automation Conference, 2008

2007

Parallelized radix-2 scalable Montgomery multiplier.

Nan Jiang, David Money Harris

Proceedings of the IFIP VLSI-SoC 2007, 2007