Naoaki Aoki

According to our database, Naoaki Aoki authored at least 6 papers between 1998 and 2000.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2000

1-GHz fully pipelined 3.7-ns address access time 8 k×1024 embedded synchronous DRAM macro.

Osamu Takahashi, Sang H. Dhong, Manabu Ohkubo, Shohji Onishi, Robert H. Dennard, Robert Hannon, Scott Crowder, Subramanian S. Iyer, Matthew R. Wordeman, Bijan Davari, William B. Weinberger, Naoaki Aoki

IEEE J. Solid State Circuits, 2000

"Timing closure by design, " a high frequency microprocessor design methodology.

Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, Nobuo Kojima, Ohsang Kwon, Kyung T. Lee, David Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia

Proceedings of the 37th Conference on Design Automation, 2000

1999

A 1-GHz logic circuit family with sense amplifiers.

Osamu Takahashi, Naoaki Aoki, Joel Silberman, Sang H. Dhong

IEEE J. Solid State Circuits, 1999

1998

A 1.0-GHz single-issue 64-bit powerPC integer processor.

Joel Silberman, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Axel Essbaum, Uttam Ghoshal, David F. Heidel, H. Peter Hofstee, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Stephen D. Posluszny, Osamu Takahashi, Ivan Vo, Brian A. Zoric

IEEE J. Solid State Circuits, 1998

A 690 ps read-access latency register file for a GHz integer microprocessor.

Osamu Takahashi, Joel Silberman, Sang H. Dhong, H. Peter Hofstee, Naoaki Aoki

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

Design methodology for a 1.0 GHz microprocessor.

Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Uttam Ghoshal, H. Peter Hofstee, David P. LaPotin, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Joel Silberman, Osamu Takahashi, Ivan Vo

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998