David P. LaPotin

According to our database1, David P. LaPotin authored at least 10 papers between 1984 and 2010.

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Bibliography

2010
Workload and network-optimized computing systems.
IBM J. Res. Dev., 2010

1998
Accurate area and delay estimation from RTL descriptions.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Design methodology for a 1.0 GHz microprocessor.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1997
Physical design challenges for performance.
Proceedings of the 1997 International Symposium on Physical Design, 1997

Delay bounded buffered tree construction for timing driven floorplanning.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1995
Verity - A formal verification program for custom CMOS circuits.
IBM J. Res. Dev., 1995

1994
Error Diagnosis for Transistor-Level Verification.
Proceedings of the 31st Conference on Design Automation, 1994

1993
Early Package Analysis: Considerations and Case Study.
Computer, 1993

1989
Early matching of system requirements and package capabilities.
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1984
DIF: A framework for VLSI multi-level representation.
Integr., 1984


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