Kyung Tek Lee

According to our database, Kyung Tek Lee authored at least 7 papers between 1997 and 2006.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2006

Implementation of a fourth-generation 1.8-GHz dual-core SPARC V9 microprocessor.

Jason M. Hart, Kyung T. Lee, Dennis Chen, Lik Cheng, Chipai Chou, Anand Dixit, Dale Greenley, Gregory Gruber, Kenneth Ho, Jesse Hsu, Naveen G. Malur, John Wu

IEEE J. Solid State Circuits, 2006

2000

"Timing closure by design, " a high frequency microprocessor design methodology.

Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, Nobuo Kojima, Ohsang Kwon, Kyung T. Lee, David Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia

Proceedings of the 37th Conference on Design Automation, 2000

1999

Critical path identification and delay tests of dynamic circuits.

Kyung Tek Lee, Jacob A. Abraham

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998

A 1.0-GHz single-issue 64-bit powerPC integer processor.

Joel Silberman, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Axel Essbaum, Uttam Ghoshal, David F. Heidel, H. Peter Hofstee, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Stephen D. Posluszny, Osamu Takahashi, Ivan Vo, Brian A. Zoric

IEEE J. Solid State Circuits, 1998

Automatic Test Pattern Generation for Crosstalk Glitches in Digital Circuits.

Kyung Tek Lee, Clay Nordquist, Jacob A. Abraham

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

Design methodology for a 1.0 GHz microprocessor.

Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Uttam Ghoshal, H. Peter Hofstee, David P. LaPotin, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Joel Silberman, Osamu Takahashi, Ivan Vo

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1997

A Novel Solution for Chip-Level Functional Timing Verification.

Rathish Jayabharathi, Kyung Tek Lee, Jacob A. Abraham

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997