Nasser Masoumi
Orcid: 0000-0002-9985-2603
According to our database1,
Nasser Masoumi
authored at least 60 papers
between 1999 and 2024.
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Bibliography
2024
An Online Calibration Method Using Hadamard-Fourier Clustering and Neural Network for Large-Scale Phased Arrays.
IEEE Trans. Instrum. Meas., 2024
Lane Detection and Tracking Datasets: Efficient Investigation and New Measurement by a Novel "Dataset Scenario Detector" Application.
IEEE Trans. Instrum. Meas., 2024
2023
A Phase Variation-Based Smart Structure for Crack Detection on Metals Using Cold Spray Additive Manufacturing.
IEEE Trans. Instrum. Meas., 2023
CraSen: A Phase Variation Passive Sensor Node for Metallic Structural Health Monitoring.
IEEE Trans. Instrum. Meas., 2023
2022
Erratum to "Nondestructive Phase Variation Based Chipless Sensing Methodology for Metal Crack Monitoring".
IEEE Trans. Instrum. Meas., 2022
2021
Nondestructive Phase Variation-Based Chipless Sensing Methodology for Metal Crack Monitoring.
IEEE Trans. Instrum. Meas., 2021
Reliable, Intelligent, and Design-Independent Digital Frequency Extraction Methodology for High Bit-Count DIFM Receivers.
IEEE Trans. Instrum. Meas., 2021
The Art of Piecewise Linear Approximation in MMSE Estimator for Most Accurate and Fast Frequency Extraction in DIFM Receivers.
IEEE Trans. Instrum. Meas., 2021
2020
IEEE Trans. Instrum. Meas., 2020
2019
IEEE Trans. Instrum. Meas., 2019
A Pigeonhole Principle-Based Method for Estimating the Resonant Frequency of SAWR Sensors.
IEEE Trans. Instrum. Meas., 2019
2018
High-Resolution Frequency Discriminator for Instantaneous Frequency Measurement Subsystem.
IEEE Trans. Instrum. Meas., 2018
Proceedings of the 9th International Symposium on Telecommunications, 2018
Design and Implementation of Efficient Smart Lighting Control System with Learning Capability for Dynamic Indoor Applications.
Proceedings of the 9th International Symposium on Telecommunications, 2018
Zone Based Control Methodology of Smart Indoor Lighting Systems Using Feedforward Neural Networks.
Proceedings of the 9th International Symposium on Telecommunications, 2018
Proceedings of the 9th International Symposium on Telecommunications, 2018
Digitally Controlled Loop Technique for Output Power Compensation in Broadband High Power Amplifier Module.
Proceedings of the 9th International Symposium on Telecommunications, 2018
2016
Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Thermal Energy Harvesting Power Supply With an Internal Startup Circuit for Pacemakers.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Proceedings of the 8th International Symposium on Telecommunications, 2016
2015
Analytical Solutions for Distributed Interconnect Models - Part II: Arbitrary Input Response and Multicoupled Lines.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
2014
Analytical Solutions for Distributed Interconnect Models - Part I: Step Input Response of Finite and Semi-Infinite Lines.
IEEE Trans. Very Large Scale Integr. Syst., 2014
Predictive Application of PIDF and PPC for Interconnects' Crosstalk, TSV, and LER Issues in UDSM ICs and Nano-Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2014
Graphene nanoribbon crossbar architecture for low power and dense circuit implementations.
Microelectron. J., 2014
Double Supply, Linear, and High Efficiency Push amplifier Design for Envelope Tracking Power amplifiers in WiMAX Applications.
J. Circuits Syst. Comput., 2014
Proceedings of the 19th IEEE European Test Symposium, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Design investigation of nanoelectronic circuits using crossbar-based nanoarchitectures.
Microelectron. J., 2013
A fully integrated linear CMOS power amplifier with high output power and dynamic range for WiMAX application.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013
2012
Microelectron. J., 2012
Reducing expected delay and power in FPGAs using buffer insertion in single-driver wires.
Microelectron. J., 2012
Efficient inclusive analytical model for delay estimation of multi-walled carbon nanotube interconnects.
IET Circuits Devices Syst., 2012
A 33.2 dBm CMOS RF power amplifier using a novel on-chip transformer power combiner for 4G WiMAX applications.
Proceedings of the 6th International Symposium on Telecommunications, 2012
2011
A Predictive and Accurate Interconnect Density Function: The Core of a Novel Interconnect-Centric Prediction Engine.
IEEE Trans. Very Large Scale Integr. Syst., 2011
The dual-edge alignment technique with improved spur reduction effects in ring oscillators.
Microelectron. J., 2011
A CMOS 4.35-mW +22-dBm IIP3 Continuously Tunable Channel Select Filter for WLAN/WiMAX Receivers.
IEEE J. Solid State Circuits, 2011
Proceedings of EUROCON 2011, 2011
Proceedings of EUROCON 2011, 2011
Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011
2009
Microelectron. J., 2009
A new and efficient approach for estimating the accurate time-domain response of single and capacitive coupled distributed RC interconnects.
Microelectron. J., 2009
An analytical delay reduction strategy for buffer-inserted global interconnects in VDSM technologies.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
Analysis and simulation of a novel gradually low-K dielectric structure for crosstalk reduction in VLSI.
Microelectron. J., 2008
2006
IEICE Electron. Express, 2006
Proceedings of the IEEE Wireless Communications and Networking Conference, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
A New Topology for Power Control of High Efficiency Class-E Switched Mode Power Amplifier.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
A Stochastic Power-Supply Noise Reduction Technique Using Max-Flow Algorithm and Decoupling Capacitance.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
Enhancing Performance and Saving Energy in CMOS DCVSL Gates by Using a New Transistor Sizing Algorithm.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005
2004
Modeling of polysilicide gate resistance effect on inverter delay and power consumption using distributed RC method and branching technique.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
2002
Integr. Comput. Aided Eng., 2002
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002
2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
An Efficient and Accurate Model for RF/Microwave Spiral Inductors Using Microstrip Lines Theory.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000
1999
A Fast Parametric Model for Contact-Substrate Coupling.
Proceedings of the VLSI: Systems on a Chip, 1999