Panagiotis Chaidos

According to our database1, Panagiotis Chaidos authored at least 6 papers between 2025 and 2026.

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Bibliography

2026
Performance Modeling & Mapping of LLM Inference on Heterogeneous Vectorized CGRAs.
Proceedings of the 17th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 15th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2026


Voltage Aware Approximate CGRA Synthesis for Energy Efficient DNN Inference.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025
A Unified Framework for Mapping and Synthesis of Approximate R-Blocks CGRAs.
CoRR, May, 2025

Flexible Hardware Accelerators for Ultra-Low Power Edge AI: The CONVOLVE Approach.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

A Bespoke Design Approach to Low-Power Printed Microprocessors for Machine Learning Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025


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