Payam Heydari

Orcid: 0000-0002-1008-1559

Affiliations:
  • University of California, Irvine, USA


According to our database1, Payam Heydari authored at least 134 papers between 1998 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2017, "For contributions to silicon-based millimeter-wave integrated circuits and systems".

Timeline

Legend:

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Links

Online presence:

On csauthors.net:

Bibliography

2024
An Isolated Frequency Compensation Technique for Ultra-Low-Power Low-Noise Two-Stage OTAs.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

2023
A Current-Adjusting Auto-Zeroing Technique for DC-Offset and Flicker-Noise Cancellation.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023

A Study of a Millimeter-Wave Transmitter Architecture Realizing QAM Directly in RF Domain.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

A Study of Out-of-Band Emission in Digital Transmitters Due to PLL Phase Noise, Circuit Non-Linearity, and Bandwidth Limitation.
IEEE Open J. Circuits Syst., 2023

Broadband Antenna Design for Terahertz Communication Systems.
IEEE Access, 2023

A Comparative Study of RF-QAM and Conventional Transmitter Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 49-63 GHz Phase-locked FMCW Radar Transceiver for High Resolution Applications.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A CMOS BD-BCI Incorporating Stimulation with Dual-Mode Charge Balancing and Time-Domain Pipelined Recording.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
A Study of BER and EVM Degradation in Digital Modulation Schemes Due to PLL Jitter and Communication-Link Noise.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A CMOS Dual-Mode Brain-Computer Interface Chipset With 2-mV Precision Time-Based Charge Balancing and Stimulation-Side Artifact Suppression.
IEEE J. Solid State Circuits, 2022

2021
Energy Efficient 100+ GHz Transceivers Enabling Beyond-5G Wireless Communications.
IEEE Wirel. Commun., 2021

An Analysis of CMRR Degradation in Multi-Channel Biosignal Recording Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

An LO Leakage Suppression Technique for Blocker-Tolerant Wideband Receivers With High-Q Selectivity at RF Input.
IEEE J. Solid State Circuits, 2021

CMOS Power-Amplifier Design Perspectives for 6G Wireless Communications.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Noise Analysis of Passive Sampling Mixers Using Auto- and Cross-Correlation Functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Comprehensive Analysis of Charge-Pump-Based Multi-Stage Multi-Output DC-DC Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Fully-Integrated 1µW/Channel Dual-Mode Neural Data Acquisition System for Implantable Brain-Machine Interfaces.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021

A 40V Voltage-Compliance 12.75mA Maximum-Current Multipolar Neural Stimulator Using Time-Based Charge Balancing Technique Achieving 2mV Precision.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

Transceivers for 6G Wireless Communications: Challenges and Design Solutions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
A Study of Multi-Phase Injection on Accelerating Crystal Oscillator Start-Up.
IEEE Trans. Circuits Syst., 2020

An Energy-Efficient CMOS Dual-Mode Array Architecture for High-Density ECoG-Based Brain-Machine Interfaces.
IEEE Trans. Biomed. Circuits Syst., 2020

A CMOS Two-Element 170-GHz Fundamental-Frequency Transmitter With Direct RF-8PSK Modulation.
IEEE J. Solid State Circuits, 2020

Millimeter-Wave Radars-on-Chip Enabling Next-Generation Cyberphysical Infrastructures.
IEEE Commun. Mag., 2020

A Prototype of a Fully-Implantable Charge-Balanced Artificial Sensory Stimulator for Bi-directional Brain-Computer-Interface (BD-BCI).
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

Thermal Analysis of a Skull Implant in Brain-Computer Interfaces.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

Pre-whitening and Null Projection as an Artifact Suppression Method for Electrocorticography Stimulation in Bi-Directional Brain Computer Interfaces.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

2019
On Analog QAM Demodulation for Millimeter-Wave Communications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A CMOS V-Band PLL With a Harmonic Positive Feedback VCO Leveraging Operation in Triode Region for Phase-Noise Improvement.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Analysis and Design of High-Order QAM Direct-Modulation Transmitter for High-Speed Point-to-Point mm-Wave Wireless Links.
IEEE J. Solid State Circuits, 2019

A 115-135-GHz 8PSK Receiver Using Multi-Phase RF-Correlation-Based Direct-Demodulation Method.
IEEE J. Solid State Circuits, 2019

A CMOS MedRadio Transceiver With Supply-Modulated Power Saving Technique for an Implantable Brain-Machine Interface System.
IEEE J. Solid State Circuits, 2019

Study and Design of a Fast Start-Up Crystal Oscillator Using Precise Dithered Injection and Active Inductance.
IEEE J. Solid State Circuits, 2019

Introduction to the Special Issue on the 2019 IEEE International Solid-State Circuits Conference (ISSCC).
IEEE J. Solid State Circuits, 2019

Dipole Cancellation as an Artifact Suppression Technique in Simultaneous Electrocorticography Stimulation and Recording.
Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019

A Wideband Blocker-Tolerant Receiver with High-Q RF-Input Selectivity and <-80dBm LO Leakage.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A Single-Channel RF-to-Bits 36Gbps 8PSK RX with Direct Demodulation in RF Domain.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A 100-120GHz 20Gbps Bits-to-RF 16QAM Transmitter Using 1-bit Digital-to-Analog Interface.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
Analysis and Design of a Wideband, Balun-Based, Differential Power Splitter at mm-Wave.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Silicon-Based Low-Power Broadband Transimpedance Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 53-61GHz Low-Power PLL With Harmonic Positive Feedback VCO in 65nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Subspace-Based Suppression of Cortical Stimulation Artifacts.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

Characterization of Stimulation Artifact Behavior in Simultaneous Electrocorticography Grid Stimulation and Recording.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

A 64-67GHz partially-overlapped phase-amplitude-controlled 4-element beamforming-MIMO receiver.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

A CMOS inductorless MedRadio OOK transceiver with a 42 μW event-driven supply-modulated RX and a 14% efficiency TX for medical implants.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

Millimeter-wave frequency generation and synthesis in Silicon.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
A Study of Operating Condition and Design Methods to Achieve the Upper Limit of Power Gain in Amplifiers at Near-f<sub>max</sub> Frequencies.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Performance Assessment of a Custom, Portable, and Low-Cost Brain-Computer Interface Platform.
IEEE Trans. Biomed. Eng., 2017

CMOS Ultralow Power Brain Signal Acquisition Front-Ends: Design and Human Testing.
IEEE Trans. Biomed. Circuits Syst., 2017

Analysis and Design of a Millimeter-Wave Cavity-Backed Circularly Polarized Radiator Based on Fundamental Theory of Multi-Port Oscillators.
IEEE J. Solid State Circuits, 2017

A high-power multi-port 0.46THz radiation source in nano-scale silicon technology using fundamental-frequency oscillation beyond <i>f<sub>MAX</sub></i> of transistors.
Proceedings of the 4th ACM International Conference on Nanoscale Computing and Communication, 2017

19.1 A fundamental-frequency 114GHz circular-polarized radiating element with 14dBm EIRP, -99.3dBc/Hz phase-noise at 1MHz offset and 3.7% peak efficiency.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Session 17 overview: TX and RX building blocks.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
Feasibility of an ultra-low power digital signal processor platform as a basis for a fully implantable brain-computer interface system.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

A small, portable, battery-powered brain-computer interface system for motor rehabilitation.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

Invited - Integrated millimeter-wave/terahertz sensor systems for near-field IoT.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
Session 25 overview: RF frequency generation from GHz to THz: RF subcommittee.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

A 64-channel ultra-low power bioelectric signal acquisition system for brain-computer interface.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
Design and Implementation of a CMOS 4-Bit 12-GS/s Data Acquisition System-On-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2014

An SQNR Improvement Technique Based on Magnitude Segmentation for Polar Quantizers.
IEEE Trans. Commun., 2014

Polar Quantizer for Wireless Receivers: Theory, Analysis, and CMOS Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A CMOS 210-GHz Fundamental Transceiver With OOK Modulation.
IEEE J. Solid State Circuits, 2014

A Silicon-Based 0.3 THz Frequency Synthesizer With Wide Locking Range.
IEEE J. Solid State Circuits, 2014

Design and Analysis of a W-band 9-Element Imaging Array Receiver Using Spatial-Overlapping Super-Pixels in Silicon.
IEEE J. Solid State Circuits, 2014

Millimeter-wave massive MIMO: the next wireless revolution?
IEEE Commun. Mag., 2014

14.7 A 300GHz frequency synthesizer with 7.9% locking range in 90nm SiGe BiCMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
A 210GHz fully integrated differential transceiver with fundamental-frequency VCO in 32nm SOI CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A 93-to-113GHz BiCMOS 9-element imaging array receiver utilizing spatial-overlapping pixels with wideband phase and amplitude control.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
Introduction to the 33rd Annual IEEE Compound Semiconductor Integrated Circuit Symposium.
IEEE J. Solid State Circuits, 2012

A BiCMOS W-Band 2×2 Focal-Plane Array With On-Chip Antenna.
IEEE J. Solid State Circuits, 2012

A 4-bit 12GS/s data acquisition System-on-Chip including a flash ADC and 4-channel DeMUX in 130nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Electrostatic Excitation for the Force Amplification of Microcantilever Sensors.
Sensors, 2011

A W-band CMOS Receiver Chipset for Millimeter-Wave Radiometer Systems.
IEEE J. Solid State Circuits, 2011

A Synthesis-Based Bandwidth Enhancement Technique for CMOS Amplifiers: Theory and Design.
IEEE J. Solid State Circuits, 2011

Design and Analysis of a W-Band SiGe Direct-Detection-Based Passive Imaging Receiver.
IEEE J. Solid State Circuits, 2011

2009
Code-modulated path-sharing multi-antenna receivers: theory and analysis.
IEEE Trans. Wirel. Commun., 2009

A CMOS Code-Modulated Path-Sharing Multi-Antenna Receiver Front-End.
IEEE J. Solid State Circuits, 2009

A Single-Chip Dual-Band 22-29-GHz/77-81-GHz BiCMOS Transceiver for Automotive Radars.
IEEE J. Solid State Circuits, 2009

A BiCMOS Dual-Band Millimeter-Wave Frequency Synthesizer for Automotive Radars.
IEEE J. Solid State Circuits, 2009

Introduction to the Special Issue on the 2008 IEEE Custom Integrated Circuits Conference.
IEEE J. Solid State Circuits, 2009

A single-chip dual-band 22-to-29GHz/77-to-81GHz BiCMOS transceiver for automotive radars.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Design and Analysis of a Current-reuse Transmitter for Ultra-low Power Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
A Multiband Inductor-Reuse CMOS Low-Noise Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Correction to "Design and Analysis of a Performance-Optimized CMOS UWB Distributed LNA".
IEEE J. Solid State Circuits, 2008

Introduction to the Special Issue on the IEEE 2007 Custom Integrated Circuits Conference.
IEEE J. Solid State Circuits, 2008

A Universal Code-Modulated Path-Sharing Multi-Antenna Receiver.
Proceedings of the WCNC 2008, IEEE Wireless Communications & Networking Conference, March 31 2008, 2008

A 24/77GHz dual-band BiCMOS frequency synthesizer.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Session 18 - Millimeter-wave circuit techniques.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Theoretical Analysis of Novel Multi-Order <i>LC</i> Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

CMOS Distributed Active Power Combiners and Splitters for Multi-Antenna UWB Beamforming Transceivers.
IEEE J. Solid State Circuits, 2007

Design and Analysis of a Performance-Optimized CMOS UWB Distributed LNA.
IEEE J. Solid State Circuits, 2007

A Nonlinear Model for Phase Noise and Jitter in LC Oscillators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Current-Equalized Distributed Receiver Front-End for UWB Direct Conversion Receivers.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

A Synthesis-based Bandwidth Enhancing Technique for CML Buffers/Amplifiers.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

A CMOS 22-29GHz Receiver Front-End for UWB Automotive Pulse-Radars.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
On the Dynamics of Regenerative Frequency Dividers.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Model-order reduction using variational balanced truncation with spectral shaping.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A 40-GHz Flip-Flop-Based Frequency Divider.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

A novel power optimization technique for ultra-low power RFICs.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

A novel millimeter-wave multi-order LC oscillator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Distributed RF Front-End for UWB Receivers.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
Design and analysis of an ultrawide-band distributed CMOS mixer.
IEEE Trans. Very Large Scale Integr. Syst., 2005

Characterizing the effects of the PLL jitter due to substrate noise in discrete-time delta-sigma modulators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Capacitive coupling noise in high-speed VLSI circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

A study of low-power ultra wideband radio transceiver architectures.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2005

Design Considerations for Low-Power Ultra Wideband Receivers.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A study of high-frequency regenerative frequency dividers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A novel 40-GHz flip-flop-based frequency divider in 0.18μm CMOS.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

A performance optimized CMOS distributed LNA for UWB receivers.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Design of ultrahigh-speed low-voltage CMOS CML buffers and latches.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Interconnect energy dissipation in high-speed ULSI circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Analysis of the PLL jitter due to power/ground and substrate noise.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

The Design and Analysis of Non-Uniform Down-Sized Differential Distributed Amplifiers.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

A novel non-uniform distributed amplifier.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Design and analysis of a distributed regenerative frequency divider using distributed mixer.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A novel ultra high-speed flip-flop-based frequency divider.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

High-frequency noise in RF active CMOS mixers.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003
Ground bounce in digital VLSI circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2003

Design and Analysis of Low-Voltage Current-Mode Logic Buffers.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Optimizing the Energy-Delay-Ringing Product in On-Chip CMOS Line Drivers.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

A novel high frequency, high-efficiency, differential class-E power amplifier in 0.18mum CMOS.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Design of ultra high-speed CMOS CML buffers and latches.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design issues in low-voltage high-speed current-mode logic buffers.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

Characterizing the effects of clock jitter due to substrate noise in discrete-time D/S modulators.
Proceedings of the 40th Design Automation Conference, 2003

2002
Interconnect Energy Dissipation in High-Speed ULSI Circuits.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Energy dissipation modeling of lossy transmission lines driven by CMOS inverters.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A comprehensive study of energy dissipation in lossy transmission lines driven by CMOS inverters.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
Jitter-Induced Power/ground Noise in CMOS PLLs: A Design Perspective.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Model Reduction of Variable-Geometry Interconnects using Variational Spectrally-Weighted Balanced Truncation.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Balanced truncation with spectral shaping for RLC interconnects.
Proceedings of ASP-DAC 2001, 2001

2000
Analysis and Optimization of Ground Bounce in Digital CMOS Circuits.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Analysis of jitter due to power-supply noise in phase-locked loops.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1998
Calculation of ramp response of lossy transmission lines using two-port network functions.
Proceedings of the 1998 International Symposium on Physical Design, 1998


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