Rosilde Corvino

According to our database, Rosilde Corvino authored at least 17 papers between 2008 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Extending Halide to Improve Software Development for Imaging DSPs.

Sander Vocke, Henk Corporaal, Roel Jordans, Rosilde Corvino, Rick J. M. Nas

ACM Trans. Archit. Code Optim., 2017

Automatic instruction-set architecture synthesis for VLIW processor cores in the ASAM project.

Roel Jordans, Lech Józwiak, Henk Corporaal, Rosilde Corvino

Microprocess. Microsystems, 2017

2014

Construction and exploitation of VLIW ASIPs with heterogeneous vector-widths.

Erkan Diken, Roel Jordans, Rosilde Corvino, Lech Józwiak, Henk Corporaal, Felipe Augusto Chies

Microprocess. Microsystems, 2014

2013

ASAM: Automatic architecture synthesis and application mapping.

Lech Józwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo, Giuseppe Notarangelo

Microprocess. Microsystems, 2013

Hierarchical DSE for multi-ASIP platforms.

Laura Micconi, Rosilde Corvino, Deepak Gangadharan, Jan Madsen, Paul Pop, Lech Józwiak

Proceedings of the 2nd Mediterranean Conference on Embedded Computing, 2013

Instruction-set architecture exploration strategies for deeply clustered VLIW ASIPs.

Roel Jordans, Rosilde Corvino, Lech Józwiak, Henk Corporaal

Proceedings of the 2nd Mediterranean Conference on Embedded Computing, 2013

Rapid and accurate energy estimation of vector processing in VLIW ASIPs.

Erkan Diken, Rosilde Corvino, Lech Józwiak

Proceedings of the 2nd Mediterranean Conference on Embedded Computing, 2013

An Efficient Method for Energy Estimation of Application Specific Instruction-Set Processors.

Roel Jordans, Rosilde Corvino, Lech Józwiak, Henk Corporaal

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Exploring processor parallelism: Estimation methods and optimization strategies.

Roel Jordans, Rosilde Corvino, Lech Józwiak, Henk Corporaal

Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012

Design space exploration in application-specific hardware synthesis for multiple communicating nested loops.

Rosilde Corvino, Abdoulaye Gamatié, Marc Geilen, Lech Józwiak

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Abstract Clocks for the DSE of Data-Intensive Applications on MPSoCs.

Rosilde Corvino, Abdoulaye Gamatié

Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012

ASAM: Automatic Architecture Synthesis and Application Mapping.

Lech Józwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW Processors.

Roel Jordans, Rosilde Corvino, Lech Józwiak

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Transformation-Based Exploration of Data Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study.

Rosilde Corvino, Erkan Diken, Abdoulaye Gamatié, Lech Józwiak

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2010

Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel Applications.

Rosilde Corvino, Abdoulaye Gamatié, Pierre Boulet

Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010

2009

Design Space Exploration for data-dominated image applications with non-affine array references. (Exploration de l'espace des architectures pour des systèmes de traitement d'image, analyse faite sur des blocs fondamentaux de la rétine numérique).

Rosilde Corvino

PhD thesis, 2009

2008

Automatic generation of a parallel tile processing unit for algorithms with non-affine array references.

Rosilde Corvino, Stéphane Mancini, Roberto Guizzetti

Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, 2008